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4 mii serial management channel timing (mdio,mdc), Table74 . mii serial management channel timing, Mii serial management channel timing (mdio,mdc) -4 – Freescale Semiconductor POWERPC MPC860T User Manual

Page 64: Mii serial management channel timing diagram -4, Mii serial management channel timing -4

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7-4

MPC860T (Rev. D) Fast Ethernet Controller Supplement

MOTOROLA

PRELIMINARYÑSUBJECT TO CHANGE WITHOUT NOTICE

7.3.4 MII Serial Management Channel Timing (MDIO,MDC)

Table 7-4 provides information on the MII serial management channel signal timing, shown
in Figure 7-4. The FEC functions correctly with a maximum MDC frequency in excess of
2.5 MHz. The exact upper bound is under investigation.

Figure 7-4 shows the MII serial management channel timing diagram.

Figure 7-4. MII Serial Management Channel Timing Diagram

Table 7-4. MII Serial Management Channel Timing

Num

Characteristic

Min

(ns)

Max

(ns)

Unit

M10

MDC falling edge to MDIO output invalid (minimum
propagation delay)

0

Ñ

ns

M11

MDC falling edge to MDIO output valid (max prop delay)

Ñ

25

M12

MDIO (input) to MDC rising edge setup

10

Ñ

ns

M13

MDIO (input) to MDC rising edge hold

0

Ñ

M14

MDC pulse width high

40%

60%

MDC period

M15

MDC pulse width low

40%

60%

MDC period

M11

MDC (output)

MDIO (output)

M12

M13

MDIO (input)

M10

M14

MM15

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Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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