Freescale Semiconductor POWERPC MPC860T - Manual (Page 38)

6-6 MPC860T (Rev. D) Fast Ethernet Controller Supplement MOTOROLA
PRELIMINARYÑSUBJECT TO CHANGE WITHOUT NOTICE
Table 6-7 describes X_DES_START Þelds.
6.2.7 Receive Buffer Size Register (R_BUFF_SIZE)
The R_BUFF_SIZE register, shown in Figure 6-7, is like the MRBLR register used by
other protocols. It speciÞes the maximum size of all receive buffers. It does not reset and
must be initialized by the user. Because the maximum frame is 2047 bytes, only bits 21Ð27
are used. This value should take into consideration that the receive CRC is always written
into the last receive buffer. To support frame lengths up to 1520 bytes, R_BUFF_SIZE must
be at least 0x0000_05F0. To ensure that R_BUFF_SIZE is a multiple of 16, bits 28Ð31 are
forced to zeros. Using buffers smaller than the recommended minimum 256 bytes increases
the risk of receive FIFO overßow due to the overhead of opening and closing buffers.
Bits 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Field X_DES_START
Reset UndeÞned
R/W Read/write
Addr 0xE14
Bits 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Field X_DES_START 00
Reset UndeÞned
R/W Read/write
Addr 0xE16
Figure 6-6. X_DES_START Register
Table 6-7. X_DES_START Field Descriptions
Bits Name Description
0Ð29 X_DES_START Pointer to start of TxBD queue.
30Р31 С Reserved. Should be written to zero by the host processor.
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
..