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3 cache flush control, Cache flush control – FUJITSU CM71-00329-7E User Manual

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CHAPTER2 Dependence Functions

2.3.1.3

Cache Flush Control

This section explains cache flush setup.

Cache Flush Control

When using a chip with cache memory, rewriting the memory and software break point setup using

commands is not reflected in the cache. Therefore, cache flushing must be performed when such

commands are executed. The debugger has a function to flush the cache automatically, monitor memory

rewriting, and set software break points, etc.

This function is controlled using the [Emulation] tab in debug environment setting dialog.

Note:

When the automatic cache flushing option is enabled, it may negatively affect the program speed.