Avago Technologies LSI53C810AE - Manual (Page 4)

4
Configuration Register Changes
for
SYM53C810AE
Register 2Ch
Subsystem Vendor ID (SSVID)
Read Only
SVID SVID SVID SVID
15-12 11-8 7-4 3-0
Default>>>
1 0 0 0
This register supports subsystem identification, which has a default value of 1000h in the
SYM53C810AE.
Register 2Eh
Subsystem ID (SSID)
Read Only
SID SID SID SID
15-12 11-8 7-4 3-0
Default>>>
1 0 0 0
This register supports subsystem identification, which has a default value of 1000h in the
SYM53C810AE.
Register 06h
Status
Read/Write
DPE SSE RMA RTA RES DT DPR RES NC RES
15 14 13 12 11 10-9 8 7-5 4 3-0
Default >>>
0 0 0 0 0 0 0 0 1 0
Reads to this register behave normally. Writes are slightly different in that bits can be cleared,
but not set. A bit is reset whenever the register is written and the data in the corresponding bit
location is a one. For instance, to clear bit 15 and not affect any other bits, write the value 8000h
to the register.
Please note the following changes to Register 06h bits 7-0.
Bits 7-5 Reserved
Bit 4 New Capabilities (NC)
This bit is set to indicate the presence of a list of extended capabilities such as PCI Power
Management. This bit is Read Only.
Bits 3-0 Reserved