Linx Technologies TRM-915-R250 - Manual (Page 7)

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If acknowledgements are enabled for assured delivery, then once the
packet is sent the module looks for an ACK from the other side. If the
ACK is not received, a retry is performed and the transmission is sent
again. If the number of transmission retries exceeds the value in the
regMAXTXRETRY register, an exception (EX_NORFACK) is raised.
Once the packet is sent, the transmitter deactivates but remains tuned to
the current channel until its hop time expires. If another packet is queued
for transmission, the module transmits this packet once the CSMA
mechanism allows access to the channel. Once the hop timer expires, the
module hops to the next channel.
Synchronization is lost whenever there is no more data to transfer and the
module has detected two consecutive hop indices without data present.
The module then returns to scan mode.
If another unit is transmitting when the module is ready to transmit a
packet, the module receives that data before attempting to transmit its
data. If the UART receive buffer gets full, the CTS line goes high to prevent
the host UART from over-running the receive buffer.
The CSMA mechanism introduces a variable delay to the transmission if
it detects that the channel is occupied. This delay is the sum of a random
period and a weighted period that is dependent on the number of times
that the module has tried and failed to access the channel. For applications
that guarantee that only one module is transmitting at any given time, the
CSMA mechanism can be turned off to avoid this delay.
Module Operation
The module employs a Frequency Hopping Spread Spectrum (FHSS)
algorithm. It has 32 channels spaced on 750kHz boundaries with a guard
band on either side. These channels are pseudo-randomly arranged into
six unique hopping tables comprised of 26 channels. The order of these
tables is chosen so that cross-correlation is minimized, allowing multiple
networks to operate in proximity with minimal interference.
When the module is not actively transmitting or receiving packets, it is in a
scan state. It cycles through the channels in the hop sequence looking for
a synchronizing packet. If it detects a preamble, it pauses to wait for the
start code and packet header. If the packet is addressed to it, the module
processes the packet and outputs the payload on the UART. If the packet
is not addressed to the module or the start code and header fail their
checks, the module resumes scanning for another packet.
When data is input on the RXD line for transmission, the module fills
a buffer. Once the UART has buffered enough data to send (either
regUARTMTU bytes input or regTXTO has expired between bytes on the
RXD line), it transmits the data. The protocol engine makes a best-effort
attempt to keep the data in at least regUARTMTU-sized packets, but splits
the data based on the remaining dwell time before hopping. New data is
not sent within the last 5% of the hop sequence, but data which is already
in the process of being sent is processed normally.
The module prefixes the data with a packet header and postfixes the data
with a 16-bit CRC. The 16-bit CRC error checking can be disabled to allow
the host application to do its own error checking.
Initially, the transmission of the packet begins on a random hop index within
the current hop sequence, and follows the hop sequence thereafter until
synchronization is lost. The module uses a Carrier-Sense-Multiple-Access
(CSMA) protocol to determine if another module is already transmitting on
the selected channel. If the channel is occupied then the module waits for it
to clear before transmitting its data.
Once the module gains access to the channel, if it is not already
synchronized, it assigns itself master status, and sends a synchronizing
preamble. Following a hop, the module that sends the first transmission
assigns itself master status, sends a synchronizing preamble, and
communications resume.