Sundance SMT329 - Manual (Page 27)

Individual I/O register addresses are detailed in the following table:
Area VME offset TIM address Peripheral Read/Write
Reserved 00-7C None - -
COMM 80-83 None Comm-port data Read/write
COMM 84-87 None Comm-port data Read/write
COMM 88-8C None
COMM 90-93 None Comm-port
status
Read/write
COMM 94-BC None
RST C0-C3 None Reset board Read/Write
RST C4-CC None
FLASH D0-D3 C000 0100 Flash data Read/Write
FLASH D4-D7 C000 0101 Flash address Read/Write
FLASH D8-DB C000 0102 Flash Key Read/Write
FLASH DC-DF C000 0103 SP3 diagnostic Read/Write
CONTROL E0-E3 C000 0000 Control 1 Read/Write
CONTROL E4-E7 C000 0001 Control 2 Read/Write
CONTROL E8-EB C000 0002 Control 3 Read/Write
CONTROL EC-EF C000 0003 Control 4 Read/Write
CONTROL F0-F3 C000 0004 Status 1 Read
CONTROL F4-F7 C000 0005 Control 6 Read/Write
CONTROL F8-FB C000 0006 Control 7 Read/Write
CONTROL FC-FF C000 0007 Reserved -
I/O2 100-3FF C000 0200-
C000 02FF
DMA & RSL Read/Write
Note that I/O2 must be software enabled to be available to the VME bus. When it is disabled,
the SMT329 will not respond to addresses in this area, and a VME bus error will result.
Actual DMA and RSL addresses in the IO2 space will be defined in a subsequent release of
this manual and Virtex4 configuration.
4.4.3 VME slave interface to the SRAM
User Manual SMT329 Page 27 of 52 Last Edited: 09/02/2007 10:58:00