Sundance SMT377 - Manual (Page 8)

Version 1.1 Page 8 of 22 SMT377 User Manual
Block Diagram.
The following diagram shows interconnections between main blocks of the SMT377.
Greyed out blocks represent the main devices fitted on the board. Other blocks are
on-board connectors or secondary devices.
Sundance High-speed
Bus (SHB) - input
60 I/O Pins; 32-bit Data
1x
C
ompor
t
12
I/O
pins
Timer,
& Co
n
trol
15
I/O
pins
2x C
om
po
rt
s
24
I/
O pi
ns
47 I/O pins
9 I/O Pins; Serial DATA-Bus
OpAmp
2 x T.I. DAC7634
16-bit @ 100kHz
Digital-to-Analog Converter
48-pins SSOP package
Two banks of ZBT-RAM
memory of 4MBytes each
Xilinx CPLD
XC9636XL
CS48
on Comport #3
and #4
JTA
G
Head
e
r
J1 Top Primary TIM
Connector
Comport 3
J2 Bottum Primary TIM
Connector
Comports 1 and 4
MMBX DAC Headers
0.1" Type
External Trigger
4 LEDs
External DAC Clock
Xilinx FPGA Virtex-II
FG456 -4
324 I/O Pins
1.5V
4 I/O pins
Comport 3
Comport 4
FPGA configuration
Figure 1 - Block diagram.