Sundance SMT370v2 - Manual (Page 44)

Version 2.0 Page 44 of 46 SMT370v2/v3 User Manual
of a DAC internal register. The 370 starts by sending out register at address 0x0, and
carries on up to register 0xd.
Example:
Let’s consider that the following registers have been loaded into the DAC
Register0 = 0x00010203
Register1 = 0x01111213
Register2 = 0x02212223
Register3 = 0x03313233
Register4 = 0x044142xx
After sending the word 0xE0000000 to an SMT370v3-AC, which internal clocks are
set to 100MHz (ADC clock) and 50MHz (DAC clock) and which ADC and DAC
channels are all enabled, the host gets back in return the following values:
0x000000AC, 0x03990D90, 0x00000033, 0x00000000, 0xAD977701,
0xAD977702, 0xAD977703, 0xAD977711, 0xAD977712, 0xAD977713, 0xAD977721,
0xAD977722, 0xAD977723, 0xAD977731, 0xAD977732, 0xAD977733, 0xAD977741,
0xAD977742.
Please note that DAC internal registers are effectively read back and that clock
synthesizer registers are not read back from the devices themselves but from the
FPGA – as they don’t have that feature.