Sundance SMT370v2 User Manual
Page 3
Version 2.0
Page 3 of 46
SMT370v2/v3 User Manual
Table of Contents
Revision History.......................................................................................................... 2
Table of Contents ....................................................................................................... 3
Contacting Sundance. ................................................................................................ 5
Notes. ......................................................................................................................... 5
Precautions................................................................................................................. 5
Outline description. ..................................................................................................... 6
Block Diagram - Architecture. ..................................................................................... 7
Architecture Description. ............................................................................................ 8
Virtex FPGA. ........................................................................................................... 9
What the FPGA does........................................................................................... 9
Ressource occupied. ......................................................................................... 10
Memory. ................................................................................................................ 10
ADCs and DAC. .................................................................................................... 11
Clock management. .............................................................................................. 11
Sundance High-speed Bus - SHB......................................................................... 11
SHBA – ADCs. .................................................................................................. 11
SHBB – DAC. .................................................................................................... 12
Communication Ports (ComPorts). ....................................................................... 12
External triggering. ................................................................................................ 12
LEDs. .................................................................................................................... 12
TTL I/Os. ............................................................................................................... 13
Sundance Standards. ............................................................................................... 13
Communication Ports (ComPorts). ....................................................................... 13
Sundance High-speed Bus - SHB......................................................................... 14
Communication links implemented on the SMT370. ............................................. 15
For more details about ComPorts and SHB. ......................................................... 15
DAC Performance. ................................................................................................... 19
SHB pinout. .............................................................................................................. 21
FPGA Pinout............................................................................................................. 22
At power-up and on reset. ........................................................................................ 26
Connector position.................................................................................................... 27