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Technical description – Sundance SMT358 User Manual

Page 8

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Version 2.5

Page 8 of 25

SMT358 User Manual

Technical description

Figure 1: SMT358 Block diagram

FPGA

XCVxxxxxBG560

Configuration Logic CPLD

Bottom Primary

Connector

50MHz Oscillator

40 way IDC
SDB_ConA

40 way IDC
SDB_ConB

A[30:0]

Global Bus

Connector

Config Control

Top Primary

Connector

H1

IIOF2

Com-Port 3

Control

Com-Port 1,4

D[31:0]

40 way IDC
SDB_ConD

40 way IDC
SDB_ConC

SDB C

SDB D

Com-Port 3 Ctrl

Com-Port 3 Data

Config D[7:0]

ZBT SRAM

BANK4

ZBT SRAM

BANK3

ZBT SRAM

BANK2

ZBT SRAM

BANK1

Memory Signals

SDB B

SDB A

Com-Port 0

Memory Signals