beautypg.com

Sundance SMT358 User Manual

Page 15

background image

Version 2.5

Page 15 of 25

SMT358 User Manual

Global Clock Buffers

The Virtex/E provides four independent Global Clock Buffers, which allow the use of 4 or 8
(for a Virtex E) programmable DLLs to produce waveforms with a wide range of frequencies
and duty cycles.

Figure 6 shows the signals assignment to each Global Clock Buffer.

Figure 6: Global Clock Buffers assignments in the Virtex/E

FPGA

XCVxxxx

BG560

ZBT SRAM BANK1, 2,3,4

BANK0

BANK4

BANK5

BANK1

BoardClk

40 way IDC
SDB_ConA

SDB A

22

Clk A

40 way IDC
SDB_ConB

SDB B

22

Clk B

Clk 2x