Sensoray 421 - Manual (Page 13)

Sensoray Model 421 Instruction Manual Page 11
DAC Data Ports
Each DAC is allocated two output ports —DACxLSB and
DACxMSB (where x is the DAC identifier 0, 1, 2, or 3) — called
bus registers. All DAC setpoint data are written into these registers.
DACxLSB is the D/A converter least-significant data byte register,
and DACxMSB is the most-significant data nibble register. The
data nibble is right-justified in the DACxMSB registers.
Data may be written to the DACxLSB or DACxMSB registers in
any order.
Note: DAC outputs do not change when the DACxLSB and
DACxMSB registers are written to. DAC outputs change only
when the LDAC port is read (see next section).
.
Base Address
Offset
Function
0 DAC0LSB
1 DAC0MSB
2 DAC1LSB
3 DAC1MSB
4 DAC2LSB
5 DAC2MSB
6 DAC3LSB
7 DAC3MSB
LDAC Port
DAC outputs change when data is transferred from
the bus registers into the corresponding DAC output
registers.
The LDAC port is used to transfer data from bus
registers to output registers. Reading from the LDAC
port transfers data to all four DAC output registers
simultaneously.
LDAC (0):
The data value returned from the LDAC port is
indeterminate and has no meaning.
x x x x x x x x
DAC Initialization
Before setting the DAC Enable Register to enable
DAC outputs, the ISAbus master should first zero
all DAC output registers. Execute this event
sequence to achieve orderly startup following a
reset:
— Write zeros to all DACxLSB and DACxMSB registers.
— Read from the LDAC port to change all DAC outputs to 0
volts.
— Enable DAC outputs by setting the CHCTRL port D bit.
Transfer Function
The relationship between DAC input code and output
voltage is shown in the following table. Input coding
for DAC channels is unsigned binary.:
Data Value
(hexadecimal)
Output Level
(volts)
000 0.0000
001 0.0024
7FF 4.9976
800 5.0000
801 5.0024
FFF 9.9976
Channel Differences
DAC channel 0 is identical to the other channels
except for the addition of a remote sense function.
Each channel has an output source impedance
specified at 85 ohms, maximum. Because channel 0
senses the DAC output after its CMOS switch,
however, its effective source impedance is zero for
output currents up to the specified maximum.
Because of their 85 ohm source impedances,
channels 1, 2, and 3 will tend to exhibit “gain error”
as a function of load current. This is not a problem as
long as the load current is constant, and hence, DAC
output voltage is monotonic.
Use DAC channel 0 if load impedance varies
significantly or absolute accuracy is important for
your application. Alternately, any of the channel 1, 2,
or 3 outputs may be buffered by external amplifiers.