Measurement Computing PCI-DIO48H/CTR15 - Manual (Page 14)

PORT 2C DATA
BADR2 + 06h
READ/WRITE
CL0 CL1 CL2 CL3 CH0 CH1 CH2 CH3
0 1 2 3 4 5 6 7
CONTROL REGISTER 2
BADR2 + 07h
WRITE only
D0 D1 - D3 D4 - - -
0 1 2 3 4 5 6 7
See BADR2 + 03h and Table 5-2 for a description of the Control Register.
COUNTER 1 DATA
BADR2 + 08h
READ/WRITE
D0 D1 D2 D3 D4 D5 D6 D7
0 1 2 3 4 5 6 7
COUNTER 2 DATA
BADR2 + 09h
READ/WRITE
D0 D1 D2 D3 D4 D5 D6 D7
0 1 2 3 4 5 6 7
COUNTER 3 DATA
BADR2 + 0Ah
READ/WRITE
D0 D1 D2 D3 D4 D5 D6 D7
0 1 2 3 4 5 6 7
CONTROL REGISTER COUNTERS 1 - 3
BADR2 + 0Bh
WRITE ONLY
D0 D1 D2 D3 D4 D5 D6 D7
0 1 2 3 4 5 6 7
The control register is used to set the operating Modes of 8254 Counters 0,1 & 2. A
counter is configured by writing the correct Mode information to the Control
Register, then the proper count data must be written to the specific Counter Register.
The Counters on the 8254 are 16-bit devices. Since the interface to the 8254 is only
8-bits wide, Count data is written to the Counter Register as two successive bytes.
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