Measurement Computing PCI-DAC6702 - Manual (Page 21)

PCI-DAC6702 and PCI-DAC6703 User's Guide Specifications
21
Table 11. PCI-DAC6703 pin out
Pin Signal Name Pin Signal Name
1 AGND 51 AGND
2 VCH0 52 n/c
3 AGND0 53 AGND
4 VCH1 54 n/c
5 AGND1 55 AGND
6 VCH2 56 n/c
7 AGND2 57 AGND
8 VCH3 58 n/c
9 AGND3 59 AGND
10 VCH4 60 n/c
11 AGND4 61 AGND
12 VCH5 62 n/c
13 AGND5 63 AGND
14 VCH6 64 n/c
15 AGND6 65 AGND
16 VCH7 66 n/c
17 AGND7 67 AGND
18 AGND 68 AGND
19 VCH8 69 n/c
20 AGND8 70 AGND
21 VCH9 71 n/c
22 AGND9 72 AGND
23 VCH10 73 n/c
24 AGND10 74 AGND
25 VCH11 75 n/c
26 AGND11 76 AGND
27 VCH12 77 n/c
28 AGND12 78 AGND
29 VCH13 79 n/c
30 AGND13 80 AGND
31 VCH14 81 n/c
32 AGND14 82 AGND
33 VCH15 83 n/c
34 AGND15 84 AGND
35 n/c 85 DIO0
36 n/c 86 DIO1
37 n/c 87 DIO2
38 n/c 88 DIO3
39 PC 5V 89 DIO4
40 DIO0 90 DIO5
41 DIO1 91 DIO6
42 DIO2 92 DIO7
43 DIO3 93 n/c
44 n/c 94 n/c
45 DIO4 95 n/c
46 DIO5 96 GND
47 DIO6 97 n/c
48 DIO7 98 n/c
49 n/c 99 n/c
50 GND 100 GND
Note 3: Note: DIO[7:0] signals are provided in two locations in order to provide flexibility for
applications which use the C100HD50-x ribbon cable.