Ttl to solid state relays – Measurement Computing CIO-DUAL-AC5 User Manual
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CIO-DUAL-AC5 User's Guide
Functional Details
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When installed, the SIP establishes either a high or low logic level at each of the eight I/O lines on the port. At
each board location, A, B, and C, there are 10 holes in a line. The hole on one end is marked "HI" and is
connected to +5V. The other end is marked "LO" and is connected to GND. The eight holes in the middle
connect to eight lines of the port, A, B or C.
To pull-up lines, orient the SIP with the common pin (dot) toward the HI end; to pull-down, install the resistor
with the common pin in the LO end.
Figure 4 shows a schematic of an SIP installed in both the pull-up and pull-down positions.
Figure 4. Pull-up and pull-down resistor SIP schematic
We recommend using 2.2 K ohm SIPs (MCC part number SP-K2.29C). Use a different value only if necessary.
Unconnected inputs float
Unconnected inputs typically float high, but not reliably. If you are using a CIO-DUAL-AC5 board for input
and have unconnected inputs, ignore the data from those lines. You do not have to terminate input lines, and
unconnected lines will not affect the performance of connected lines. Ensure that you mask out any
unconnected bits in software.
TTL to solid state relays
Many applications require digital outputs to switch AC and DC voltage motors on and off or to monitor AC and
high DC voltages. These AC and high DC voltages cannot be controlled or read directly by the TTL digital
lines of a CIO-DUAL-AC5.
Solid State Relays (SSRs) allow control and monitoring of AC and high DC voltages and provide 750 V
isolation. SSRs are the recommended method of interfacing to AC and high DC signals.
The most convenient way to use solid state relays and a CIO-DUAL-AC5 board is to use a solid state relay
rack. A SRR rack circuit board has output buffers to switch the socketed SSRs. The rack recommended for use
with the CIO-DUAL-AC5 board is the SSR-PB24 from Measurement Computing Corporation.
Information on digital I/O techniques
General information regarding digital I/O techniques is available in the Guide to Signal Connections (available
at
.