Measurement Computing CIO-DAS800 - Manual (Page 10)

Status & ID / Counter Control BASE + 7
Read Counter 2 / Load Counter 2 BASE + 6
Read Counter 1 / Load Counter 1 BASE + 5
Read Counter 0/ Load Counter 0 BASE + 4
4.4 FIFO
The FIFO buffer is 256 bytes deep. A larger FIFO makes higher throughput of A/D conversions possible.
This is important when running Windows, and will be more important in future versions of that OS. This
does not affect compatibility in any way because it is a hardware-only function and is transparent to the
software.
4.5 FIFO HALF-FULL INTERRUPT
In addition to a larger FIFO, the CIO-DAS800 has a 1/2-full interrupt. This means that a transfer request
is made after the CIO-DAS800 accumulates 128 samples instead of after every sample. This greatly
improves throughput. This does not affect compatibility with other similar boards in any way because it
is a hardware function and is transparent to the software.
4.6 WAIT STATE JUMPER
Adding this jumper causes a wait state to be inserted into each CPU cycle whenever the CIO-DAS800 is
accessed. This may be necessary on machines with very fast ISA busses, but the need for the wait state is
very rare. This jumper does not affect compatibility in any way because it is a hardware function and is
transparent to the software.
4.7 REFERENCE VOLTAGE
The CIO-DAS800 A/D converter, an AD674, provides a precision 10V reference.
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