Chapter 5 - digital i/o programming guide – DFI CD102 Series User Manual

Page 61

www.dfi .com

Chapter 5 Digital I/O Programming Guide

Chapter 5

Chapter 5 - Digital I/O Programming Guide

Register Description

The Input Port Register (register 0) reflects the incoming logic levels of the pins, regard-

less of whether the pin if defined as an input or output by the Configuration Register. They

act only on the red operation. Writes to this register have no effect. The default value (X) is

determined by the externally applied logic level. Before a red operation, a write transmission

is sent with the command byte to indicate to the I

C device that the Input Port Regiser will be

accessed next.

BIT

I-7

I-6

I-5

I-4

I-3

I-2

I-1

I-0

DEFAULT

The Onput Port Register (register 1) shows the outgoing logic levels of the pins defined as

outputs by the Configuration Register. Bit values in this register have no effect on pins defined

as inputs. In turns, reads from this register reflect the value that is in the flip-flop contolling

the output selection, not the actual pin value.

BIT

O-7

O-6

O-5

O-4

O-3

O-2

O-1

O-0

DEFAULT

The Polarity Inversion Register (register 2) allows polarity inversion of the pins defined as

inputs by the Configuration Register. If a bit in this register is set (written with 1), the cor-

responding port pin’s polarity is inverted. If a bit in this register is clear (written with a 0), the

corresponding port pin’s original polarity is retained.

BIT

N-7

N-6

N-5

N-4

N-3

N-2

N-1

N-0

DEFAULT

The Configuration Register (register 3) configures the direction of the I/O pins. If a bit in this

output driver. If a bit in this register is cleared to 0, the corresponding port is enabled as an

input.

BIT

C-7

C-6

C-5

C-4

C-3

C-2

C-1

C-0

DEFAULT