Artesyn MVME7616E Transition Module Installation and Use (April 2015) - Manual (Page 32)

Functional Description
MVME7616E Transition Module Installation and Use (6806800A43D) 32
MXSYNC# is clocked out using the falling edge of MXCLK and MDXO is clocked out with the
rising edge of the MXCLK. MXDI is sampled at the rising edge of MXCLK (the transition module
synchronizes MXDI with MXCLK’s rising edge).
The timing relationships among MXCLK, MXSYNC#, MXDO, and MXDI are illustrated in the
next figure.
3.4 Serial Interface Module Circuitry
Each Serial Interface Module has a 60-pin connector that provides all signal and power
connections to the MVME761 transition module.
TTL-level signals
All TTL-level signals, with the exception of data and clocks, are active low. The pullup resistors
on the MVME761 transition module drive all TTL inputs to the SIM to a known logic level.
SIMs
The SIMs have surge suppression circuitry for all port signals going to the external connector.
This consists of a series resistor and a dual 15V clamp diode to chassis ground. All series
resistors are 100 ohms except on the EIA-530 balanced drives, which use 10 ohm series
resistors.
Figure 3-4 Multiplex Signal Timing Chart
RTS3 DTR3 LLB3 RLB3 Reserved
CTS3 DSR3 DCD3 TM3 DCD2
MXCLK
MXSYNC#
MXDO
MXDI
Time Slot 15 Time Slot 0 Time Slot 1 Time Slot 2 Time Slot 3
11640.00 9611