Artesyn COMX-P4080-2G-ENP2 Installation and Use (August 2014) - Manual (Page 12)

COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)
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12
About this Manual
COP Common On-chip Processor
COTS Commercial-Off-the-Shelf
CPU Central Processing Unit
CRC Cyclic Redundancy Check
DDR Double Data Rate
DLL Delay-Locked Loop
DMA Direct Memory Access
DRAM Dynamic Random Access Memory
DUART Dual Universal Asynchronous Receiver/Transmitter
ECC Error Correction Code
EEPROM Electrically Erasable Programmable Read-Only Memory
EPROM Erasable Programmable Read-Only Memory
FCC Federal Communications Commission
FEC Fast Ethernet Controller
FIFO First In First Out
F/W Firmware
FPBGA Flip Chip Plastic Ball Grid Array
GB GigaBytes
Gbit Gigabit
Gbps Gigabits Per Second
GPI General Purpose Input
GPIO General Purpose Input Output
GPO General Purpose Output
GMII Gigabit Media Independent Interface
GPR General Purpose Register
H/W Hardware
ID Identification
I/O Input/Output
Abbreviation Definition