Analog Way Smart Edge FX - STE200 Programmer's Guide - Manual (Page 7)

7
Group Name Cmd RespDescription
Read /
Write Min
Value Max
value Default
value
Values Index #1 Index #2 Index #3
VERK xK xK
Checksum/version of the
programmable components
Rd/Wr 0 65535 0
0 = Number of
programmables
components
1 = Main micro-
controler
2 = Front panel
micro-controler
3 = FPGA Caecina
4 = FPGA Fannia
5 = FPGA Thrasea
6 = Synchro CPLD
VERV xV xV Variable set version Rd 0 65535 42
VERUPD xU xU Updater version Rd 0 65535 0
OPT yo yo Detected options Rd 0 65535 0
bit 0 = Lan Module
bit 1 = SDI In 1 board (SDI 1
and 2)
bit 2 = Recording board
bit 3 = CF Caecina
bit 4 = CF Fannia
bit 5 = CF Thrasea
bit 6 = SDI In 2 board (SDI 3
and 4)
bit 7 = Audio Evolution
bit 8 = HDCP DVI In
Evolution
REV xR xR Moher board revision Rd 0 255 0
INPUT
IN_AUTOSET_ALL Ia Ia
Auto-setting request for all the
inputs
Rd/Wr 0 1 0
IN_AUTOSET Ii Ii
Auto-setting request for the
specified input
Rd/Wr 0 1 0
0 = Input1
1 = Input2
2 = Input3
3 = Input4
4 = Input5
5 = Input6
8 = Input9
9 = Input10
10 = Input11
11 = Input12
12 = Input13
13 = Input14