Avalue EQM-CDV - Manual (Page 47)

User ’s Manual
EQM-CDV User ’s Manual 47
Both Root And Endpoint ports
ASPM L1
Disabled[Default]
Enabled
Enable PCIe ASPM L1
URR
Disabled[Default]
Enabled
PCI Express Unsupported
Request Reporting
Enable/Disable.
FER
Disabled[Default]
Enabled
PCI Express Device Fatal Error
Reporting Enable/Disable
NFER
Disabled[Default]
Enabled
PCI Express Device Non-Fatal
Error Reporting Enable/Disable.
CER
Disabled[Default]
Enabled
PCI Express Device Correctable
Error Reporting Enable/Disable
CTO
Disabled[Default]
Enabled
PCI Express Completion Timer
TO Enable/Disable
SEFE
Disabled[Default]
Enabled
Root PCI Express System Error
on Fatal Error Enable/Disable
SENFE
Disabled[Default]
Enabled
Root PCI Express System Error
on Non-Fatal Error
Enable/Disable
SECE
Disabled[Default]
Enabled
Root PCI Express system Error
on Correctable Error
Enable/Disable
PME SCI
Disabled
Enabled[Default]
PCI Express PME SCI
Enable/Disable.
Hot Plug
Disabled[Default]
Enabled
PCI Express Hot Plug
Enable/Disable
Extra Bus Reserved 0 - 7
Extra Bus Reserved (0 -7) for
bridges behind this Root Bridge.
Reserved Memory 1 – 20MB
Reserved Memory and
Prefetchable Memory (1-20MB)
Range for this Root Bridge.
Reserved I/O 4K/8K/12K/16K/20K
Reserved I/O
(4K/8K/12K/16K/20K) Range for
this Root Bridge.
3.6.4 Boot settings