Maxim Integrated Petaluma (MAXREFDES30) ZedBoard - Manual (Page 3)

Petaluma (MAXREFDES30#) ZedBoard Quick Start Guide
3
1. Required Equipment
• PC with Windows® OS with Xilinx® ISE®/SDK version 14.2 or later and two USB
ports (Refer to Xilinx AR# 51895 if you installed ISE WebPack
TM
design software
on your PC.)
• License for Xilinx EDK/SDK version 14.2 or later (free WebPack license is OK)
• Petaluma (MAXREFDES30#) board
• ZedBoard TM
development kit
• Industrial sensor or signal source
2. Overview
Below is a high-level overview of the steps required to quickly get the Petaluma design
running by downloading and running the FPGA project. Detailed instructions for each
step are provided in the following pages. The Petaluma (MAXREFDES30#)
subsystem reference design will be referred to as Petaluma throughout this
document.
1) Connect the Petaluma board to the J1 FMC connector of a ZedBoard as shown
in Figure 1 .
2) Download the latest RD30V01_00.ZIP file located at the Petaluma page.
3) Extract the RD30V01_00.ZIP file to a directory on your PC.
4) Open the Xilinx SDK.
5) Download the bitstream (.BIT) file to the board. This bitstream contains the FPGA
hardware design and software bootloader.
6) Use Xilinx SDK to download and run the executable file (.ELF) on one of the two
ARM
®
Cortex
TM
-A9 processors.