Maxim Integrated 78M6610+PSU Hardware Design Guidelines - Manual (Page 10)

78M6610+PSU Hardware Design Guidelines AN_6610_107
10 Rev 0
GNDD
V
3P3A
V
3P3D
GNDA
1000pF 22µF
(BULK)
V
3P3
Place Capacitors
Close to V
3P3A
0.1µF
CAPACITOR’S
DISTANCE FROM
78M6610+PSU
0.1µF
78M6610+PSU
The basic power supply filter connections are shown in Figure 6, showing also the required decoupling
capacitors. 3.3 VDC bypassing incorporates the combination of three different capacitor values. A 1000
pF in parallel with a 0.1 µF ceramic capacitor must be placed as close as possible to the 78M6610+PSU
V
3P3A
pin. Place the 1000 pF capacitor closest to the V
3P3A
pin of the 78M6610+PSU. An additional 22 µF
bulk capacitor is placed in the vicinity of the V
3P3D
pin to provide decoupling for the external DIO circuitry.
These three capacitor values provide decoupling over a wide frequency spectrum.
Figure 6: Power Supply Decoupling