Maxim Integrated 78Q8430 ST 5100/OS-20 with NexGen TCP/IP Stack - Manual (Page 22)

78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack UM_8430_005
22 Rev. 1.0
5.1.4 STi5100 IPSTB Configuration
The STi5100 configuration parameters are contained in the C:\ipstba5\config\board\mb390_mem.cfg file.
ST5100 FMI Bus Cycle Settings
The FMI Bus cycle settings in the file are shown below:
##------------------------------------------------------------------------------
## Bank 2 - 32MBytes Stem1 Configured as 16-bit peripheral
##------------------------------------------------------------------------------
## Parameters: -weuseoeconfig 0 -waitpolarity 0 -latchpoint 1 -datadrivedelay 0
## -busreleasetime 2 -csactive 3 -oeactive 1 -beactive 2 -portsize 16
## -devicetype 1
## -cyclenotphaseread 1 -accesstimeread 1d -cse1timeread 2
## -cse2timeread 0 -oee1timeread 0 -oee2timeread 0 -bee1timeread 0
## -bee2timeread 0
## -cyclenotphasewrite 1 -accesstimewrite 1d -cse1timewrite 2
## -cse2timewrite 2 -oee1timewrite 0 -oee2timewrite 0 -bee1timewrite 0
## -bee2timewrite 0
## -strobeonfalling 0 -burstsize 0 -datalatency 0 -dataholddelay 0
## -burstmode 0
##poke -d (STI5100_FMI_BANK2_DATA0) 0x001016D1 ##BE not active during rd
##poke -d (STI5100_FMI_BANK2_DATA1) 0x9d200000
##poke -d (STI5100_FMI_BANK2_DATA2) 0x9d220000
##poke -d (STI5100_FMI_BANK2_DATA3) 0x00000000
##ST IPSTB original settings
## poke -d (STI5100_FMI_BANK2_DATA0) 0x041086e9
## poke -d (STI5100_FMI_BANK2_DATA1) 0x0e024400
## poke -d (STI5100_FMI_BANK2_DATA2) 0x0e024400
## poke -d (STI5100_FMI_BANK2_DATA3) 0x00000000
##TTPMOD TSC modified settings
## Won't work with 7 cycles
## poke -d (STI5100_FMI_BANK2_DATA1) 0x87111100 ## 7 cycle Read, CSE1=CSE2=OEE1=OEE2=1
## poke -d (STI5100_FMI_BANK2_DATA2) 0x87111100 ## 7 cycle Write, CSE1=CSE2=OEE1=OEE2=1
## The following timings work
## poke -d (STI5100_FMI_BANK2_DATA1) 0x8C111100 ## 12 cycle Read, CSE1=CSE2=OEE1=OEE2=1
## poke -d (STI5100_FMI_BANK2_DATA2) 0x8C111100 ## 12 cycle Write, CSE1=CSE2=OEE1=OEE2=1
## poke -d (STI5100_FMI_BANK2_DATA1) 0x8A111100 ## 10 cycle Read, CSE1=CSE2=OEE1=OEE2=1
## poke -d (STI5100_FMI_BANK2_DATA2) 0x8A111100 ## 10 cycle Write, CSE1=CSE2=OEE1=OEE2=1
## poke -d (STI5100_FMI_BANK2_DATA1) 0x89111100 ## 9 cycle Read, CSE1=CSE2=OEE1=OEE2=1
## poke -d (STI5100_FMI_BANK2_DATA2) 0x89111100 ## 9 cycle Write, CSE1=CSE2=OEE1=OEE2=1
poke -d (STI5100_FMI_BANK2_DATA0) 0x04100691 ##LATCHPT=1, BUSRELEASE=1, CS/OE active R&W
poke -d (STI5100_FMI_BANK2_DATA1) 0x88020202 ## 7 cycle Read, CSE1=OEE1=1,CSE2=OEE2=2
poke -d (STI5100_FMI_BANK2_DATA2) 0x88020202 ## 7 cycle Write, CSE1=OEE1=1,CSE2=OEE2=2
poke -d (STI5100_FMI_BANK2_DATA3) 0x00000000