Maxim Integrated 78Q8430 ST 5100/OS-20 with NexGen TCP/IP Stack - Manual (Page 12)

78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack UM_8430_005
12 Rev. 1.0
added to the receive QUE and the interrupt delay timer is enabled, the timer is started if it is not already
running. If the interrupt delay timer is already running when data is added to the receive QUE, the
running timer is not affected. When a BLOCK is removed from the receive QUE, the interrupt delay timer
is reset. This means that the driver must completely empty the receive QUE each time it services the
delay timer interrupt or risk stranding data in the QUE.
3. WM_INT_FREE_BLOCK: Watermark interrupt value.
The watermark values are set based on the minimum number of free memory blocks that must be
available to avoid the specified action. In the case of the interrupt watermark, the specified action is an
interrupt. The value of the interrupt watermark should be set low enough that it is not triggered under
ordinary circumstances, as this would increase the interrupt service load of the system. The interrupt
water mark should also be set high enough that the interrupt is triggered while there is still enough free
memory to keep the system moving long enough to take action and avoid data loss due to a lack of
memory.
4. WM_HR_FREE_BLOCK: Headroom Watermark.
The Headroom watermark specifies the number of free memory BLOCKS below which the MAC receiver
is halted. This effectively reserves some blocks of memory for MAC transmit. The default value for the
Headroom watermark is 0x04. This allows the MAC transmit to have at least 4 blocks of memory to send
a packet.
5. WM_PAUSE_FREE_BLOCK: Free blocks before sending pause.
The PAUSE watermark specifies the minimum number of free memory BLOCKS that triggers the
automatic transmission of the PAUSE frame.