Cypress Quad HOTLink II CYV15G0404RB - Manual (Page 16)

CYV15G0404RB
Document #: 38-02102 Rev. *C Page 16 of 27
Table 4. Device Control Latch Configuration Table
ADDR Channel Type DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0
Reset
Value
0
(0000b)
A S 1 0 X X 0 0 RXRATEA GLEN0 10111111
1
(0001b)
A S SDASEL2A[1] SDASEL2A[0] SDASEL1A[1] SDASEL1A[0] X X TRGRATEA GLEN1 10101101
2
(0010b)
A D RXBISTA[1] RXPLLPDA RXBISTA[0] X ROE2A ROE1A X GLEN2 10110011
3
(0011b)
B S 1 0 X X 0 0 RXRATEB GLEN3 10111111
4
(0100b)
B S SDASEL2B[1] SDASEL2B[0] SDASEL1B[1] SDASEL1B[0] X X TRGRATEB GLEN4 10101101
5
(0101b)
B D RXBISTB[1] RXPLLPDB RXBISTB[0] X ROE2B ROE1B X GLEN5 10110011
6
(0110b)
C S 1 0 X X 0 0 RXRATEC GLEN6 10111111
7
(0111b)
C S SDASEL2C[1] SDASEL2C[0] SDASEL1C[1] SDASEL1C[0] X X TRGRATEC GLEN7 10101101
8
(1000b)
C D RXBISTC[1] RXPLLPDC RXBISTC[0] X ROE2C ROE1C X GLEN8 10110011
9
(1001b)
D S 1 0 X X 0 0 RXRATED GLEN9 10111111
10
(1010b)
D S SDASEL2D[1] SDASEL2D[0] SDASEL1D[1] SDASEL1D[0] X X TRGRATED GLEN10 10101101
11
(1011b)
D D RXBISTD[1] RXPLLPDD RXBISTD[0] X ROE2D ROE1D X GLEN11 10110011
12
(1100b)
GLOBAL S 1 0 X X 0 0 RXRATEGL FGLEN0 N/A
13
(1101b)
GLOBAL S SDASEL2GL[1] SDASEL2GL[0] SDASEL1GL[1] SDASEL1GL[0] X X TRGRATEGL FGLEN1 N/A
14
(1110b)
GLOBAL D RXBISTGL[1] RXPLLPDGL RXBISTGL[0] X ROE2GL ROE1GL X FGLEN2 N/A
15
(1111b)
MASK D D7 D6 D5 D4 D3 D2 D1 D0 11111111
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