Kontron MSM800SEL - Manual (Page 41)

MSM800SEV/SEL / Detailed System Description
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6 Detailed System Description
This system's configuration is based on the ISA architecture. Check the I/O and the Memory maps in this Chapter.
6.1 MSM800SEV/SEL Incompatibilities to a Standard PC/AT
6.1.1 PC104 BUS / ISA BUS
An onboard LPC to ISA-bridge makes it possible to expand the functionality of the board with additional PC/104 cards.
Unfortunately, because of the transformation from LPC to ISA it is not possible to realize a 16bit access. This does not
mean that these cards cannot be used, but that the 16bit access is divided into two. Therefore the access to these
cards is a little bit slower.
The LPC supports the following bus cycles:
Cycle Type Sizes Supported Comments
Memory Read 1Byte Optional for both LPC hosts and peripherals
Memory Write 1Byte Optional for both LPC hosts and peripherals.
I/O Read 1Byte Optional for peripherals.
I/O Write 1Byte Optional for peripherals.
DMA Read 1, 2, 4Byte Optional for peripherals.
DMA Write 1, 2, 4Byte Optional for peripherals.
BUS Master Memory Read 1, 2, 4Byte Optional for both LPC hosts and peripherals, but strongly recommended for hosts.
BUS Master Memory Write 1, 2, 4Byte Optional for both LPC hosts and peripherals, but strongly recommended for hosts.
BUS Master I/O Read 1, 2, 4Byte Optional for both LPC hosts and peripherals.
BUS Master I/O Write 1, 2, 4Byte Optional for both LPC hosts and peripherals.
Firmware Memory Read 1, 2, 4, 128Byte Optional for both LPC hosts and peripherals.
Firmware Memory Write 1, 2, 4Byte Optional for both LPC hosts and peripherals.
Note: This means, all non-BUS Master I/O and MEM cycles are only 8bits wide and never 16bits wide. 16bit data
transfer is available in the BUS Master modus only.
6.1.2 ISA-Incompatibility with ISA-PCCARD-Controller
Experience shows that ATA drives controlled in an ISA-PCMCIA Controller do not work.
Solution: Use a PCCARD-Controller on the PCI-BUS.
6.1.3 ISA-Incompatibility with 16bit I/O Transfer with FPGA-Decoder
KCC's experience shows that 16bit I/O transfers decoded with a FPGA do not always work correctly. Each case must be
tested. Expect problems on odd addresses.
Solution: Use two 8bit transfers instead of one 16bit transfer. For time critical transfers we recommend using the
PCI-BUS.
6.1.4 ISA-Incompatibility with 16bit Memory Transfer with FPGA-Decoder
Experience shows that 16bit Memory-transfers decoded with a FPGA do not always work correctly. Each case must be
tested. Expect problems on odd addresses.
Solution: Use two 8bit transfers instead of one 16bit transfer. For time critical transfers we recommend using the
PCI-Bus.