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Operational mode descriptions – Cypress CY7B991 User Manual

Page 12

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CY7B991
CY7B992

Document Number: 38-07138 Rev. *B

Page 12 of 19

Operational Mode Descriptions

Figure 2

shows the PSCB configured as a zero skew clock buffer. In this mode the 7B991/992 is used as the basis for a low-skew

clock distribution tree. When all of the function select inputs (xF0, xF1) are left open, the outputs are aligned and each drives a
terminated transmission line to an independent load. The FB input is tied to any output in this configuration and the operating frequency
range is selected with the FS pin. The low-skew specification, coupled with the ability to drive terminated transmission lines (with
impedances as low as 50 ohms), enables efficient printed circuit board design.

Figure 3

shows a configuration to equalize skew between metal

traces of different lengths. In addition to low skew between
outputs, the PSCB is programmed to stagger the timing of its
outputs. Each of the four groups of output pairs are programmed
to different output timing. Skew timing is adjusted over a wide
range in small increments with the appropriate strapping of the
function select pins. In this configuration the 4Q0 output is fed

back to FB and configured for zero skew. The other three pairs
of outputs are programmed to yield different skews relative to the
feedback. By advancing the clock signal on the longer traces or
retarding the clock signal on shorter traces, all loads can receive
the clock pulse at the same time.

In this illustration the FB input is connected to an output with 0-ns
skew (xF1, xF0 = MID) selected. The internal PLL synchronizes

Figure 2. Zero Skew and Zero Delay Clock Driver

Figure 3. Programmable Skew Clock Driver

SYSTEM

CLOCK

L1

L2

L3

L4

LENGTH L1 = L2 = L3 = L4

FB
REF
FS
4F0
4F1
3F0
3F1
2F0
2F1
1F0
1F1

4Q0
4Q1
3Q0
3Q1
2Q0
2Q1

1Q0
1Q1

TEST

Z

0

LOAD

LOAD

LOAD

LOAD

REF

Z

0

Z

0

Z

0

LENGTH L1 = L2

L3 < L2 by 6 inches

L4 > L2 by 6 inches

SYSTEM

CLOCK

L1

L2

L3

L4

FB
REF

FS

4F0

4F1
3F0

3F1
2F0

2F1
1F0

1F1

4Q0

4Q1
3Q0

3Q1
2Q0

2Q1
1Q0

1Q1

TEST

Z

0

LOAD

LOAD

LOAD

LOAD

REF

Z

0

Z

0

Z

0

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