Cirrus Logic AN349 - Manual (Page 9)

AN349
AN349REV1 9
6. Migrating an Existing Design to Use the CS1601
6.1 Footprint Compatibility
The CS1601 is packaged in the industry-standard 8-pin SOIC and is footprint-compatible with the L6562. Figure 11 shows the
Pin assignments of the CS1601 and the L6562. Figure 12 shows the typical PFC section on the ballast using the L6562. Figure
13 shows the typical PFC section of the ballast using the CS1601. In both schematics, the V
cc
generation is not demonstrated.
It will be discussed in a separate section.
Although the CS1601 is footprint compatible with the L6562, it is not a direct drop-in-replacement. Changes to the L6562 system
BOM are necessary as shown in Figure 13.
Figure 11. Pin Assignments for CS1601 and L6562
6.2 BOM Changes Necessary to use CS1601
The following is a typical connection diagram for a ballast using the L6562.
Figure 12. PFC Schematic Of Benchmark Ballast Using L6562
CS P FC Current S ens e
IFB Link V oltage S ens e
ZCD P FC Zero-c urrent Detec t
GND Ground
GD P FC Gate Driv er
V DD IC S upply V oltage
S TBY S tandby
IAC Rec tifier V oltage S ens e
4
3
2
1
5
6
7
8
CS1601
CS Input to P WM Comparator
INV Inv erting Input of E rror A mplifier
ZCD Demag. S ens ing Input
GND Ground
GD Gate Driv er Ouput
V CC IC S upply V oltage
COMP Output of E rror A mplifier
MULT Main Input to Multiplier
4
3
2
1
5
6
7
8
L6562
R1
1.5M 
R2
1.5M 
R5
68K
R7
0. 82 
0. 6W
R9
750K 
R10
750K 
8
1
D1
C1
0. 47uF
400V
C7
100 uF
Regulated
DC Output Q1
AC
Mains
BR1
BR1
BR1
BR1
L6562
GD
ZCD INV
GND
CS MULT
VDD
L
B
6
3
5
7
4
V
DD
R11
9.53K 
C4
2.2 uF
R6
12K 
R3
22K 
C2
100nF
2
C5
680 nF
C3
4.7uF R8
0.82 
0.6 W
COMP