System overview, 1 cs8421 sample rate converter, 2 cs8406 digital audio transmitter – Cirrus Logic CDB8421 User Manual
Page 3: 3 cs8416 digital audio receiver, Cdb8421

CDB8421
DS641DB3
3
1. SYSTEM OVERVIEW
The CDB8421 demonstration board is an excellent means for evaluating the CS8421 stereo
sample rate converter. Digital audio signal interfaces are provided in the form of S/PDIF receiver
and transmitter and PCM clock/data headers.
The CDB8421 schematic set is shown in Figures 1 through 9 and the board layout is shown in
Figures 10 through 12, and the bill of materials is shown in Table 3.
1.1
CS8421 Sample Rate Converter
A complete description of the CS8421 is included in the CS8421 product data sheet [1], avail-
able online at
D9 (SRC_UNLOCK) indicates when the SRC is not locked and output from the CS8421 SD-
OUT pin is not valid.
1.2
CS8406 Digital Audio Transmitter
The operation of the CS8406 transmitter and a discussion of the digital audio interface are
included in the CS8406 data sheet [2].
The CS8406 converts the PCM data generated by the CS8421 to the standard S/PDIF data
format. The CS8406 can operate in master or slave mode and accepts 128*Fs, 256*Fs, or
512*Fs master clock on the OMCK input pin. The serial audio input data for the CS8406 is
received from the serial audio output of the CS8421. Digital Interface format selection of I²S
(up to 24-bit), Left Justified (up to 24-bit), or Right Justified (16 or 24-bit) can be made.
S/PDIF output is through J6 or J15.
1.3
CS8416 Digital Audio Receiver
The operation of the CS8416 receiver (see Figure 3) and a discussion of the digital audio in-
terface are included in the CS8416 data sheet [3].
The CS8416 converts the input S/PDIF data stream into PCM data for the CS8421. The
CS8416 operates in master or slave mode and can output either 128*Fs or 256*Fs from its
RMCK pin. Digital Interface format selection of I²S (24-bit), Left Justified (24-bit), or Right
Justified (16 or 24-bit) can be made.
The CS8416 contains an internal input multiplexer which must be set to receive data from
either the optical input connector (J12) or coaxial input connector (J5). This is done by setting
the appropriate switch on switch-bank S4 to the COAXIAL or OPTICAL position.
D10 (RERR) indicates a receiver error, such as loss of lock.
S/PDIF input is through J5 or J12.