Cirrus Logic CDB8421 - Manual (Page 2)

CDB8421
2 DS641DB3
TABLE OF CONTENTS
1. SYSTEM OVERVIEW ............................................................................................................... 3
1.1 CS8421 Sample Rate Converter ....................................................................................... 3
1.2 CS8406 Digital Audio Transmitter ...................................................................................... 3
1.3 CS8416 Digital Audio Receiver .......................................................................................... 3
1.4 Clocking ............................................................................................................................. 4
1.5 Clock and Data Headers .................................................................................................... 4
1.6 CPLD Board Setup ............................................................................................................ 4
1.7 Power ................................................................................................................................. 6
1.8 Grounding and Power Supply Decoupling ......................................................................... 6
2. BLOCK DIAGRAM ................................................................................................................... 8
3. SCHEMATICS .......................................................................................................................... 9
4. LAYOUT ................................................................................................................................. 17
5. APPENDIX A: CS8406 TCBL CONNECTION FOR THE CDB8421 REV. A ......................... 20
6. REFERENCES ........................................................................................................................ 21
7. REVISION HISTORY .............................................................................................................. 22
LIST OF FIGURES
Figure 1. Block Diagram.................................................................................................................. 8
Figure 2. Power ............................................................................................................................... 9
Figure 3. CS8416 .......................................................................................................................... 10
Figure 4. CS8416 to CS8421 ........................................................................................................ 11
Figure 5. CS8421 .......................................................................................................................... 12
Figure 6. CS8421 to CS8406 ........................................................................................................ 13
Figure 7. CS8406 .......................................................................................................................... 14
Figure 8. Mode Switches............................................................................................................... 15
Figure 9. CPLD.............................................................................................................................. 16
Figure 10. Silk Screen ................................................................................................................... 17
Figure 11. Topside Layer .............................................................................................................. 18
Figure 12. Bottomside Layer ......................................................................................................... 19
LIST OF TABLES
Table 1. Clock Sources ................................................................................................................... 4
Table 2. Switch S1, Serial Input and Output Master/Slave and Speed Mode Settings ................... 4
Table 3. Switch S2, Serial Output Formats ..................................................................................... 5
Table 4. Switch S3, Serial Input Formats ........................................................................................ 5
Table 5. Switch S4, Board Setup .................................................................................................... 6
Table 6. System Connections ......................................................................................................... 7
Table 7. Header Connections (J8 and J11)..................................................................................... 7
Table 8. Revision History .............................................................................................................. 22