Cirrus Logic CS5373A - Manual (Page 23)

CS5373A
DS703F2 23
5.1.4 Modulator Idle Tones
The CS5373A modulator is
ΔΣ type and so can
produce ‘idle tones’ in the measurement band-
width when the differential input signal is a
steady-state DC signal within ± 50 mV of mid-
scale. Idle tones result from low-frequency
patterns in the output bit stream and appear in
the measurement spectrum as small tones
about -135 dB down from full scale.
Idle tones are eliminated within the CS5373A
modulator by automatically adding +100 mV of
internal differential offset during conversion to
push idle tones out of the measurement band-
width. Care should be taken to ensure external
offset voltages do not negate the internally
added differential offset.
5.1.5 Modulator Stability
The CS5373A’s
ΔΣ modulator has a 4 th
order
architecture which is conditionally stable and
may go into an oscillatory condition if the ana-
log inputs are over-ranged more than 5% past
either positive or negative full scale.
If an unstable condition is detected, the modu-
lator collapses to a 1
st
order system and tran-
sitions the MFLAG output low-to-high to signal
an error condition to the CS5378 digital filter.
The analog input signal must be reduced to
within the full-scale range for at least 32 MCLK
cycles for the modulator to recover from an os-
cillatory condition. If the analog input remains
over-ranged for an extended period, the mod-
ulator will cycle between 4
th
order and 1
st
or-
der operation and the MFLAG output will be
seen to pulse.
5.2 AC Test Modes
AC test modes (MODE 1, 2, 3, 6) enable the
modulator and use the digital test bit stream
(TBS) input from the CS5378 digital filter to
construct analog AC waveforms. The digital bit
stream input to the TDATA pin encodes the
analog waveform as over-sampled one-bit
ΔΣ
data, which is then converted into precision
differential or common mode analog AC sig-
nals by the CS5373A’s test DAC.
5.2.1 AC Differential
The first three AC test modes (MODE 1, 2, 3)
enable the modulator and AC test circuitry to
create precision differential analog signals for
THD and impulse testing of the measurement
channel. In mode 1, both sets of differential an-
alog outputs (OUT and BUF) are enabled. In
mode 2 only the OUT analog output is en-
abled, and the BUF output is high impedance.
In mode 3 only the BUF analog output is en-
abled, and the OUT output is high impedance.
OUT+
OUT-
BUF+
BUF-
CS5373A
MODE 1
Maximum
5 Vpp
Differential
Maximum
5 Vpp
Differential
OUT+
OUT-
BUF+
BUF-
CS5373A
MODE 2
Maximum
5 Vpp
Differential
High
Impedance
OUT+
OUT-
BUF+
BUF-
CS5373A
MODE 3
High
Impedance
Maximum
5 Vpp
Differential
Figure 10. AC Differential Modes