Cirrus Logic CDB5346 User Manual
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DS861DB1
CDB5346
TABLE OF CONTENTS
1.1 Power ............................................................................................................................................... 3
1.2 Grounding and Power Supply Decoupling ....................................................................................... 3
1.3 CS5346 Audio ADC ......................................................................................................................... 3
1.4 CS8406 Digital Audio Transmitter .................................................................................................... 3
1.5 CS2000 ............................................................................................................................................ 4
1.6 External Control Headers ................................................................................................................. 4
1.7 Analog Inputs ................................................................................................................................... 4
1.8 Analog Outputs ................................................................................................................................ 4
1.9 Serial Control Port ............................................................................................................................ 4
3.1 CDB5346 Controls Tab .................................................................................................................... 6
3.2 Register Maps Tab ........................................................................................................................... 7
3.3 Pre-Configured Script Files .............................................................................................................. 7
3.3.1 12.288MHz, CS5346 Master - ADC Ch 1 In to SPDIF Out ..................................................... 7
3.3.2 12.288MHz, CS8406 Master - ADC Ch 1 In to SPDIF Out ..................................................... 8
3.3.3 12.288MHz, J10 Master - ADC Ch 1 In to SPDIF Out ............................................................ 8
4. CDB CONNECTORS, JUMPERS, AND SWITCHES ............................................................................. 9
5. CDB BLOCK DIAGRAM ...................................................................................................................... 10
6. CDB SCHEMATICS .............................................................................................................................. 11
7. CDB LAYOUT ....................................................................................................................................... 16
8. REVISION HISTORY ............................................................................................................................ 19
LIST OF FIGURES
Figure 1.CDB5346 Controls Tab ................................................................................................................. 6
Figure 2.Register Maps Tab ........................................................................................................................ 7
Figure 3.Block Diagram ............................................................................................................................. 10
Figure 4.CS5346 (Schematic Sheet 1) ..................................................................................................... 11
Figure 5.Analog Inputs/Outputs (Schematic Sheet 2) ............................................................................... 12
Figure 6.USB Microcontroller (Schematic Sheet 3) .................................................................................. 13
Figure 7.S/PDIF and PCM Output (Schematic Sheet 4) ........................................................................... 14
Figure 8.Power (Schematic Sheet 5) ........................................................................................................ 15
Figure 9.Component Map ......................................................................................................................... 16
Figure 10.Top Layer .................................................................................................................................. 17
Figure 11.Bottom Layer ............................................................................................................................. 18
LIST OF TABLES
Table 1. System Connections ..................................................................................................................... 9
Table 2. System Jumper Settings ............................................................................................................... 9
Table 3. Revision History .......................................................................................................................... 19