Cirrus Logic CS4362A - Manual (Page 31)

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CS4362A
6. If the INCR bit is set to 0 and further SPI writes to other registers are desired, it is necessary to bring
CS high, and follow the procedure detailed from step 1. If no further writes to other registers are de-
sired, bring CS high.
4.15 Memory Address Pointer (MAP)
4.16 INCR (Auto Map Increment Enable)
Default = ‘0’
0 - Disabled
1 - Enabled
4.16.1 MAP4-0 (Memory Address Pointer)
Default = ‘00000’
7 6 5 4 3 2 1 0
INCR Reserved Reserved MAP4 MAP3 MAP2 MAP1 MAP0
0 0 0 0 0 0 0 0
M A P
M S B LSB
D A TA
byte 1 byte n
R /W
M A P = M e m o ry A d d re s s P o in te r
A D D R E S S
C H IP
C DIN
C C L K
C S
0011000
Figure 19. Control Port Timing, SPI Mode