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3 differential signals, 2 digital signals, 1 clock input – Cirrus Logic CS3301A User Manual

Page 10: 2 gain selection, 3 mux selection, Differential signals, Digital signals, Figure 4. single-channel system architecture, Cs3301a

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CS3301A

10

DS757F1

2.1.3

Differential Signals

Analog signals into and out of the CS3301A are
differential, consisting of two halves with equal but
opposite magnitude varying about a common mode
voltage.

A full scale 5 Vpp differential signal centered on a
-0.15 V common mode can have:

SIG+ = -0.15 V + 1.25 V = 1.1 V

SIG- = -0.15 V - 1.25 V = -1.4 V

SIG+ is +2.5 V relative to SIG-

For the reverse case:

SIG+ = -0.15 V - 1.25 V = -1.4 V

SIG- = -0.15 V + 1.25 V = 1.1 V

SIG+ is -2.5 V relative to SIG-

The total swing for SIG+ relative to SIG- is
(+2.5 V) - (-2.5 V) = 5 V

pp

. A similar calculation

can be done for SIG- relative to SIG+. Note that a
5 V

pp

differential signal centered on a -0.15 V

common mode voltage never exceeds 1.1 V and
never drops below -1.4 V on either half of the sig-
nal.

By definition, differential voltages are to be mea-
sured with respect to the opposite half, not relative

to ground. A multimeter differentially measuring
between SIG+ and SIG- in this example would
properly read 1.767 V

rms

, or 5 V

pp

.

2.2

Digital Signals

2.2.1

Clock Input

The clock signal is used by the chopper-
stabilization circuitry of the amplifier analog in-
puts. The CLK pin can be driven by an external
clock source for synchronous operation, or CLK
can be grounded to run from its own internally gen-
erated clock signal. The CLK pin is connected to a
clock detect circuit which will disable the internal
clock and use an external clock if one is supplied.
If the internal clock signal is to be used, the CLK
pin should be connected to GND.

2.2.2

Gain Selection

The CS3301A supports gain ranges of x1, x2, x4,
x8, x16, x32, and x64. They are selected using the
GAIN0, GAIN1, and GAIN2 pins as shown in

Table 1 on page 7

.

2.2.3

Mux Selection

The analog inputs to the amplifier are multiplexed,
with external signals applied to the INA+, INA- or
INB+, INB- pins. An internal termination is also
available for noise tests. Input mux selection is

∆Σ

Modulator

Test

DAC

Digital Filter

AMP

Differential

Sensor

M
U
X

µController

or

Configuration

EEPROM

System

Telemetry

CS3301A
CS3302A

CS5378

CS5373A

Figure 4. Single-Channel System Architecture