beautypg.com

C transaction example – Matrix Orbital VK204-25 Legacy User Manual

Page 21

background image

to inform the module that its responses are to be output via I

2

C. This can be done by sending command

254 /160 / 0 to turn off auto transmission of data in RS232. This will keep the data in the buffer until the
master clocks a read of the slave. The I

2

C data lines operate at 5V normally or 3.3V for -1U style units. The

VK204-25 uses 8-bit addressing, with the 8th or Least Significant Bit (LSB) bit designated as the read/write
bit, a 0 designates a write address and a 1 designates a read address. The default read address of the display
module will be 0x51, whereas the write address is 0x50 by default. This address may be changed by using
cmd 254 / 51 /

. The VK204-25 should only be sent addresses that are even (LSB is 0). When the
I

2

C master wishes to write to the display, the effective address is $50 (0101 0000) , since the LSB has to be

0 for an I

2

C master write. When the I

2

C master wishes to read the VK204-25, the effective address is $51

(0101 0001), since the LSB has to be 1 for an I

2

C master read.

If we take a standard Phillips 7 bit address of $45 (100 0101), Matrix Orbital’s VK204-25 would describe

this Phillips I

2

C address as $8A (1000 1010). The read address would be $8B (1000 1011).

The unit does not respond to general call address ($00).

When communicating in I

2

C the VK204-25 will send an ACK on the 9th clock cycle when addressed.

When writing to the display module, the display will respond with a ACK when the write has successfully
been completed. However if the buffer has been filled, or the module is too busy processing data it will
respond with a NAK. When performing a multiple byte read within one I

2

C transaction, each byte read from

the slave should be followed by an ACK to indicate that the master still needs data, and a NAK to indicate
that the transmission is over.

The VK204-25 has some speed limitations, especially when run in I

2

C mode. Here are some considera-

tions when writing I

2

C code:

* to be able to read the replies of query commands (eg. cmds 54, 55) the following command must be

sent (only needs to be sent once, so this can be done somewhere in init): 254 / 160 / 0 this command puts
the reply data in the I

2

C output buffer instead of the RS232 output buffer. Please note that due to a 16 byte

output buffer, query commands that reply with more than 16 bytes cannot be read (eg cmd Get FileSystem
Directory)

* 3ms delay between the read commands

* 625us delay in between data bytes within a transaction is necessary

* 375us between transactions is necessary

NOTE

These delays are consrevative, and may be decreased based on performance

4.1.2

I

2

C Transaction Example

The typical I

2

C transaction contains four parts: the start sequence, addressing, information, and stop

sequence. To begin a transaction the data line, SDA, must toggle from high to low while the clock line, SCL,
is high. Next, the display must be addressed using a one byte hexadecimal value, the default to write to the
unit is 0x50, while read is 0x51. Then information can be sent to the unit; even when reading, a command
must first be sent to let the unit know what type of information it is required to return. After each bit is sent,
the display will issue an ACK or NACK as described above. Finally, when communication is complete, the
transaction is ended by toggling the data line from low to high while the clock line is high. An example of
the use of this algorithm to write a simple “HELLO” message can be seen in 3.

Matrix Orbital

VK204-25

17