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A960m-mv user manual, Chapter 2 – Elitegroup A960M-MV (V1.0A) User Manual

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A960M-MV USER MANUAL

24

Chapter 2

Memory Control

Memory Clock DCT0 is:

None

Memory Clock DCT1 is:

(DDR-1333/667Mhz)

Command Rate

[Auto]

Memory Clock Mode

[Manual]

Memclock Value

[333MHz]

Memory Timing Mode

[Auto]

CAS Latency

9

RAS to CAS Delay

9

Row Precharge Time

9

RAS Active Time

24

Row Cycle Time

33

RAS to RAS Delay

4

Read CAS to Precharge Time

5

Aptio Setup Utility - Copyright (C) 2011 American Megatrends, Inc.

Version 2.14.1219. Copyright (C) 2011 American Megatrends, Inc.

fMemory Control
Scroll to this item to view the following screen:

Set Memory Clock Mode.

lk

:Select Screen

+/- : Value

Enter : Select

mn

:Select Item

F1:General Help

F2:Previous Value

F3:Optimized Defaults

F4:Save & Exit

ESC:Exit

CAS Latency (9)

This item determines the operation of DDR SDRAM memory CAS (column address
strobe). It is recommended that you leave this item at the default value. The 2T
setting requires faster memory that specifically supports this mode.

RAS to CAS Delay (9)

This item specifies RAS# to CAS# delay to Rd/Wr command to the same bank.

Row Precharge Time (9)

This item specifies Row precharge to Active or Auto-Refresh of the same bank.

RAS Active Time (24)

This item specifies the RAS# active time.

Memory Clock Mode (Manual)
This item allows you to set memory clock mode. Default is Auto.

Memory Clock DCT0/1 is (None/DDR3-1333/667 Mhz)
This item shows the current memory clock of DCT0/1.

Command Rate (Auto)
This item allows you to set command rate.

Memclock Value (333MHz)
This item allows you to set memclock value. This item only shows when Memory
Clock Mode set to Manual or Limited.

Memory Timing Mode (Auto)
This item allows you to select memory timing mode.

Row Cycle Time (33)

This item specifies the Row cycle time.

Main

Advanced Chipset

M.I.B. III

Boot Security Exit