Teledyne LeCroy MIPI D-PHY - Manual (Page 9)

Operator's Manual
918800 RevA 9
BRIEF HS DATA TIMING TEST DESCRIPTIONS
Name Purpose
TLP-01
To verify that the duration (TLPX) of the final Data Lane LP-01 state immediately before
HS transmission is greater than the minimum conformant value.
THS-PREPARE
To verify that the duration of the final LP-00 state immediately before HS transmission
(THS-PREPARE) is within the conformance limits.
THS-ZERO
To verify the time the DUT Data Lane transmitter drives the HS-0 differential state prior
to transmitting the HS Sync sequence.
THS-PREPARE+ZERO
To verify that the combined time of THS-PREPARE plus the time the DUT Data Lane
transmitter drives the HS-0 differential state prior to transmitting the HS Sync sequence
(THS-ZERO) is greater than the minimum required duration.
THS-SYNC
To verify the time to transmit of the HS Sync sequence before the first bit of data is
transmitted.
THS-TRAIL
To verify that the duration the DUT Data Lane TX drives the inverted final differential
state following the last payload data bit of a HS-TX burst (THS-TRAIL), is greater than the
minimum required value.
TEOT
To verify that the combined duration of the THS-TRAIL plus TREOT intervals (a.k.a. TEOT)
of the DUT Data Lane transmitter is less than the maximum allowed value.
TREOT
To verify that the 30%-85% Post-EoT Rise Time (TREOT) of the DUT LP Data Lane
transmitter is within the conformance limits.
THS-EXIT
To verify that the duration that the Data Lane transmitter remains in the LP-11 (Stop)
state after exiting HS mode (THS-EXIT), is greater than the minimum required value.
 With HS Clock Timing selected in the Category field, the following Measure values are available:
TLP-01, TLCK-PREPARE, TLCK-ZERO, TLCK-PREPARE+ZERO, TLCK-TRAIL, TREOT, TEOT, THS-EXIT, UIinst,
and HS-Bitrate.
BRIEF HS CLOCK TIMING TEST DESCRIPTIONS
Name Purpose
TLP-01
To verify that the duration (TLPX) of the final Clock Lane LP-01 state immediately before
HS transmission is greater than the minimum conformant value.
TCLK-PREPARE
To verify that the time that the DUT Clock Lane transmitter drives LP-00 (TCLK-PREPARE)
prior to driving TCLK-ZERO when entering HS mode, is within the conformance limits.
TCLK-ZERO
To verify the time that the DUT Clock Lane transmitter drives the extended HS-0
differential state prior to starting clock transmission.
TCLK-PREPARE+ZERO
To verify that the combined time of TCLK-PREPARE plus the time that the DUT Clock Lane
transmitter drives the extended HS-0 differential state prior to starting clock
transmission (TCLK-ZERO) is greater than the minimum required duration.
TCLK-TRAIL
To verify that the duration that the DUT Clock Lane HS transmitter drives the final HS-0
differential state following the last payload clock bit of a HS transmission burst (TCLK-
TRAIL) is greater than the minimum required value.
TREOT
To verify that the 30%-85% Post-EoT Rise Time (TREOT) of the DUT LP Clock Lane
transmitter is within the conformance limits.