Diodes AM9800 - Manual (Page 9)

Data Sheet
Three Phase Direct PWM Sensorless Motor Driver AM9800
Sep. 2012 Rev. 1. 0 BCD Semiconductor Manufacturing Limited
9
Application Information (Continued)
Figure 11. Rotation Mode Waveform (PWM Mode)
(f=25kHz, V
H
=5V, V
L
=0V, Duty Cycle=50%)
8. Soft Switching Circuit
AM9800 adopts variable duty soft switching to
minimize the motor drive noise. Figure 12 shows
how soft switching circuit works during the fan
rotation.
Figure 12. Soft Switching Waveform
9. Current Limiter Circuit
The driver current is detected by connecting a resistor
between RF pin (pin 15) and ground. The current
limiter circuit limits the output current peak value to
a level determined by the equation I=V
RF
/R
F
(V
RF
=0.25V typical).
10. OSC Circuit
A capacitor must be connected between OSC pin (Pin
7) and ground. When a capacitor is connected, the
OSC pin starts self-oscillation, and its frequency
becomes the startup frequency. Figure 13 shows a fan
system’s OSC Waveform.
Figure 13. OSC Waveform (C
OSC
=2200pF)
11．Position Detector Comparator Circuit
for Rotor
The position detector comparator circuit for the rotor
is a comparator for detecting rotor positional
information with the back EMF signal generated
when the motor rotates. The IC determines the timing
at which the output block applies current to the motor
based on the position information obtained here. A
capacitor (between 1000 and 10000pF) must be
connected between COMIN pin (pin 5) and the FIL
pin (pin 6) to prevent any motor startup misoperation
that is caused by the comparator input noise.
12．FG Output Circuit
FG output pin (pin 10) provides a pulse signal
equivalent to what provided by systems using a
Hall-effect sensor. A pull-up resistor (10kΩ is
recommended) must be connected between FG pin
and the power supply. Figure 14 shows the FG output
signal when the fan rotates.
Figure 14. FG Output Signal
13. Lock Shutdown and Auto Restart
This IC detects the rotation of the motor by internal
circuit block, and adjusts lock detection ON time (t
ON
)
and lock detection OFF time (t
OFF
) by internal counter.
t
ON
and t
OFF
are shown as below:
Figure 15. Lock Mode
V
UO
5V/div
V
VO
5V/div
V
WO
5V/div
-I
WO
100mA/div
Time 5ms/div
V
UO
5V/div
V
VO
5V/div
V
WO
5V/div
-I
WO
200mA/div
Time 200 µs/div
V
UO
5V/div
V
VO
5V/div
V
FG
5V/div
V
OSC
100mV/div
Time 500
µs/div
Time 5ms/div
Time 1s/div
V
UO
5V/div
V
VO
5V/div
V
WO
5V/div