beautypg.com

Electrical characteristics, 1a dual channel current-limited power switch – Diodes AP2172 User Manual

Page 5

background image

AP2162/AP2172

1A DUAL CHANNEL CURRENT-LIMITED POWER

SWITCH

AP2162/AP2172 Rev. 5

5 of 17

FEBRUARY 2009

www.diodes.com

©

Diodes Incorporated

Electrical Characteristics



(T

A

= 25

o

C, V

IN

= +5.0V, unless otherwise stated)

Symbol

Parameter

Test Conditions

Min Typ. Max

Unit

V

UVLO

Input UVLO

R

load

=1k

Ω 1.6

1.9

2.5

V

I

SHDN

Input Shutdown Current

Disabled, I

OUT

= 0

0.5

1

μA

I

Q

Input Quiescent Current, Dual Enabled, I

OUT

= 0

100

160

μA

I

LEAK

Input Leakage Current

Disabled, OUT grounded

1

μA

I

REV

Reverse Leakage Current

Disabled, V

IN

= 0V, V

OUT

= 5V, I

REV

at V

IN

1

μA

R

DS(ON)

Switch on-resistance

V

IN

= 5V, I

OUT

= 0.5A,

-40

o

C

≤ T

A

≤85

o

C

MSOP-8L-EP

115

150

m

SOP-8L

120

160

m

V

IN

= 3.3V, I

OUT

= 0.5A, -40

o

C

≤ T

A

≤85

o

C

140

180

m

I

SHORT

Short-circuit

current

limit

Enabled into short circuit, C

L

=68

μF

1.4 A

I

LIMIT

Over-Load Current Limit

V

IN

= 5V, V

OUT

= 4.6V, C

L

=68

μF, -40

o

C

T

A

≤85

o

C

1.1 1.5 1.9 A

I

Trig

Current limiting trigger
threshold

V

IN

= V

EN

, Output Current Slew rate

(<100A/s), C

L

=68

μF

2.4 A

V

IL

EN Input Logic Low Voltage

V

IN

= 2.7V to 5.5V

0.8

V

V

IH

EN Input Logic High Voltage

V

IN

= 2.7V to 5.5V

2

V

I

SINK

EN Input leakage

V

EN

= 5V

1

μA

T

D(ON)

Output turn-on delay time

C

L

=1

μF, R

load

=10

0.05 ms

T

R

Output turn-on rise time

C

L

=1

μF, R

load

=10

0.6

1.5

ms

T

D(OFF)

Output turn-off delay time

C

L

=1

μF, R

load

=10

0.01 ms

T

F

Output

turn-off

fall

time

C

L

=1

μF, R

load

=10

0.05

0.1 ms

R

FLG

FLG output FET on-resistance I

FLG

=10mA

30

50

T

Blank

FLG

blanking

time

C

IN

=10

μF, C

L

=68

μF

4 7 15

ms

T

SHDN

Thermal shutdown threshold Enabled, R

load

=1k

140

°C

T

HYS

Thermal shutdown hysteresis

25

°C

θ

JA

Thermal Resistance
Junction-to-Ambient

SOP-8L (Note 4)

110

o

C/W

MSOP-8L-EP (Note 5)

60

o

C/W

Notes: 4. Test condition for SOP-8L: Device mounted on FR-4 2-layer board, 2oz copper, with minimum recommended pad layout.

5. Test condition for MSOP-8L-EP: Device mounted on FR-4 2-layer board, 2oz copper, with minimum recommended pad on top layer and 3

vias to bottom layer ground plane.

















This manual is related to the following products: