Asus P4U800-X - Manual (Page 49)

ASUS P4U800-X motherboard 2-17
CAS Read Latency [Auto (By SPD)]
Sets the latency between the DRAM command and the time the data becomes
available. Configuration options: [Auto (By SPD)] [2.0(DDR)/2(SDR)]
[2.5(DDR)/3(SDR)] [3.0(DDR)/3(SDR)]
Current CAS Latency [2.5]
The value for this field is auto-detected.
DRAM Performance [Auto (By SPD)]
Sets the DRAM performance. Set this item to Manual to adjust the tRP, tRAS, and
tRCD items. Configuration options: [Auto (By SPD)] [Manual]
DRAM Timing tRP [3T]
Sets the DRAM Precharge Time to Row Active Time.
Configuration options: [5T] [4T] [3T] [2T]
DRAM Timing tRAS [6T]
Sets the DRAM Precharge Time to Row Active Time.
Configuration options: [8T] [7T] [6T] [5T]
DRAM Timing tRCD [3T]
Sets the DRAM Row Active Time to Command Time.
Configuration options: [5T] [4T] [3T] [2T]
2.4.2 Chip Configuration
F1 : Help ↑↓ : Select Item -/+ : Change Value F5 : Setup Defaults
ESC : Exit →← : Select Menu Enter : Select Sub-menu F10 : Save and Exit
Select Menu
Item Specific Help
Set the latency
between the DRAM
command and the time
the data actually
becomes available.
Chip Configuration
CAS Read Latency [Auto (By SPD)]
Current CAS Latency 2.5
DRAM Performance [Auto (By SPD)]
x DRAM Timing tRP 3T
x DRAM Timing tRAS 6T
x DRAM Timing tRCD 3T
AGP Aperture Size [128MB]
MEM Addr/Cmd Setup Time [2T]
2T Turnaround Time [Enabled]
Separate By 1T [Enabled]
AGP Transfer Mode 8X
AGP Fast Write Mode [Disabled]
Performance Acceleration [Auto]
Dynamic Clock Gating [Enabled]