2 cpu configuration, 3 chipset, Cpu configuration -13 – Asus M4A77T/USB3 User Manual
Page 51: Chipset -13
ASUS M4A77T/USB3
2-13
2.4.3
Chipset
NorthBridge Configuration
DRAM Controller Configuration
Bank Interleaving [Auto]
Allows you to enable the bank memory interleaving. Configuration options: [Disabled]
[Auto]
Channel Interleaving [Auto]
Allows you to enable the channel memory interleaving.
Configuration options: [Disabled] [Address bits 6] [Address bits 12] [Auto]
[XOR of Address bits [20:16, 6]] [XOR of Address bits [20:16, 9]]
2.4.2
CPU Configuration
The items in this menu show the CPU-related information that the BIOS automatically
detects.
GART Error Reporting [Disabled]
This option should remain disabled for the normal operation. The driver developer may
enable it for testing purpose. Configuration options: [Disabled] [Enabled]
Microcode Updation [Enabled]
Enables or disables Microcode Updation. Configuration options: [Disabled] [Enabled]
Secure Virtual Machine Mode [Disabled]
Enables or disables Secure Virtual Machine Mode (SVM) Configuration options: [Disabled]
[Enabled]
Cool ‘n’ Quiet [Enabled]
Enables or disables the AMD Cool ‘n’ Quiet technology. Configuration options: [Enabled]
[Disabled]
ACPI SRAT Table [Enabled]
Enables or disables the building of ACPI SRAT table. Configuration options: [Enabled]
[Disabled]
C1E Support [Disabled]
Enables or disables the CPU Enhanced Halt (C1E) function, a CPU power-saving function
in system halt state. When this item is enabled, the CPU core frequency and voltage will be
reduced during the system halt state to decrease power consumption. Configuration options:
[Disabled] [Enabled]
Advanced Clock Calibration [Disabled]
Adjusts the processor’s overclocking capability. When this item is set to [Auto], the BIOS
automatically adjusts this function. When this item is set to [All Cores], the processor has
the best overclocking performance. When this item is set to [Per Core], the processor’s
overclocking capability is enhanced. Configuration options: [Disabled] [Auto] [All Cores]
[Per Core]