Applications information – Rainbow Electronics MAX1541 User Manual
Page 40
MAX1540/MAX1541
Power-MOSFET Dissipation
Worst-case conduction losses occur at the duty factor
extremes. For the high-side MOSFET (N
H
), the worst-
case power dissipation due to resistance occurs at
minimum input voltage:
Generally, use a small high-side MOSFET to reduce
switching losses at high input voltages. However, the
R
DS(ON)
required to stay within package power-dissi-
pation limits often restricts how small the MOSFET can
be. The optimum occurs when the switching losses
equal the conduction (R
DS(ON)
) losses. High-side
switching losses do not become an issue until the input
is greater than approximately 15V.
Calculating the power dissipation in high-side
MOSFETs (N
H
) due to switching losses is difficult, since
it must allow for difficult-to-quantify factors that influ-
ence the turn-on and turn-off times. These factors
include the internal gate resistance, gate charge,
threshold voltage, source inductance, and PC board
layout characteristics. The following switching loss cal-
culation provides only a very rough estimate and is no
substitute for breadboard evaluation, preferably includ-
ing verification using a thermocouple mounted on N
H
:
where C
RSS
is the reverse transfer capacitance of N
H
,
and I
GATE
is the peak gate-drive source/sink current
(1A typ).
Switching losses in the high-side MOSFET can become
a heat problem when maximum AC adapter voltages
are applied due to the squared term in the switching-
loss equation (C
✕
V
IN
2
✕
f
SW
). If the high-side MOS-
FET chosen for adequate R
DS(ON)
at low-battery
voltages becomes extraordinarily hot when subjected
to V
IN(MAX)
, consider choosing another MOSFET with
lower parasitic capacitance.
For the low-side MOSFET (N
L
), the worst-case power
dissipation always occurs at maximum battery voltage:
The absolute worst case for MOSFET power dissipation
occurs under heavy overload conditions that are
greater than I
LOAD(MAX)
but are not high enough to
exceed the current limit and cause the fault latch to trip.
To protect against this possibility, “overdesign” the cir-
cuit to tolerate:
where I
VALLEY(MAX)
is the maximum valley current
allowed by the current-limit circuit, including threshold
tolerance and sense-resistance variation. The
MOSFETs must have a relatively large heatsink to han-
dle the overload power dissipation.
Choose a Schottky diode (D
L
) with a forward-voltage
drop low enough to prevent the low-side MOSFET’s
body diode from turning on during the dead time. As a
general rule, select a diode with a DC current rating
equal to 1/3 the load current. This diode is optional and
can be removed if efficiency is not critical.
Applications Information
Step-Down Converter Dropout
Performance
The output-voltage adjustable range for continuous-
conduction operation is restricted by the nonadjustable
minimum off-time one-shot. For best dropout perfor-
mance, use the slower (200kHz) on-time setting. When
working with low input voltages, the duty-factor limit
must be calculated using worst-case values for on- and
off-times. Manufacturing tolerances and internal propa-
gation delays introduce an error to the TON K-factor.
This error is greater at higher frequencies (Table 3).
Also, keep in mind that transient-response performance
of buck regulators operated too close to dropout is
poor, and bulk output capacitance must often be
added (see the V
SAG
equation in the Design Procedure
section).
The absolute point of dropout is when the inductor cur-
rent ramps down during the minimum off-time (
∆I
DOWN
)
as much as it ramps up during the on-time (
∆I
UP
). The
ratio h =
∆I
UP
/
∆I
DOWN
indicates the controller’s ability
to slew the inductor current higher in response to
increased load, and must always be greater than 1. As
h approaches 1, the absolute minimum dropout point,
the inductor current cannot increase as much during
each switching cycle, and V
SAG
greatly increases
unless additional output capacitance is used.
I
I
V
V
V
V
f
L
OUT
IN
OUT
IN SW
LOAD
VALLEY(MAX)
+
=
−
(
)
2
PD (N Resistance)
-
V
V
(I
)
R
L
OUT
IN(MAX)
LOAD
DS(ON)
2
=
×
1
PD (N Switching)
H
IN(MAX)
RSS
SW
LOAD
GATE
2
=
(
)
Ч
Ч
V
C
f
I
I
PD (N Resistance)
V
V
(I
)
R
H
OUT
IN
LOAD
DS(ON)
2
=
×
Dual Step-Down Controllers with Saturation
Protection, Dynamic Output, and Linear Regulator
40
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