Rainbow Electronics MAX1093 - Manual (Page 17)

MAX1091/MAX1093
250ksps, +3V, 8-/4-Channel, 10-Bit ADCs
with +2.5V Reference and Parallel Interface
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Table 6. Full-Scale and Zero-Scale for Unipolar and Bipolar Operation
UNIPOLAR MODE BIPOLAR MODE
COM COM Zero Scale Zero Scale
— -V REF /2 + COM Negative Full Scale —
V REF + COM V REF /2 + COM Positive Full Scale Full Scale
sion cycles, and 2 read cycles. This assumes that the
results of the last conversion are read before the next
control byte is written. Throughputs up to 300ksps can
be achieved by first writing a control word to begin the
acquisition cycle of the next conversion, and then read-
ing the results of the previous conversion from the bus
(Figure 10). This technique allows a conversion to be
completed every 16 clock cycles. Note that the switch-
ing of the data bus during acquisition or conversion
can cause additional supply noise, which may make it
difficult to achieve true 10-bit performance.
Layout, Grounding, and Bypassing
For best performance, use printed circuit (PC) boards.
Wire-wrap configurations are not recommended since
the layout should ensure proper separation of analog
and digital traces. Do not run analog and digital lines
parallel to each other, and don’t lay out digital signal
paths underneath the ADC package. Use separate
analog and digital PC board ground sections with only
one star point (Figure 11) connecting the two ground
systems (analog and digital). For lowest-noise opera-
tion, ensure the ground return to the star ground’s
power supply is low impedance and as short as possi-
ble. Route digital signals far away from sensitive analog
and reference inputs.
High-frequency noise in the power supply (VDD) could
influence the proper operation of the ADC’s fast com-
parator. Bypass V
DD to the star ground with a network
of two parallel capacitors, 0.1µF and 4.7µF, located as
close as possible to the MAX1091/MAX1093s’ power
supply pin. Minimize capacitor lead length for best sup-
ply-noise rejection; add an attenuation resistor (5
Ω) if
the power supply is extremely noisy.
Definitions
Integral Nonlinearity
Integral nonlinearity (INL) is the deviation of the values
on an actual transfer function from a straight line. This
straight line can be either a best-straight-line fit or a line
drawn between the end points of the transfer function,
once offset and gain errors have been nullified. The
static linearity parameters for the MAX1091/MAX1093
are measured using the end-point method.
Differential Nonlinearity
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of 1LSB. A
DNL error specification of less than 1LSB guarantees
no missing codes and a monotonic transfer function.
Aperture Definitions
Aperture jitter (t AJ ) is the sample-to-sample variation in
the time between the samples. Aperture delay (t AD ) is
the time between the rising edge of the sampling clock
and the instant when an actual sample is taken.
Signal-to-Noise Ratio
For a waveform perfectly reconstructed from digital
samples, signal-to-noise ratio (SNR) is the ratio of full-
scale analog input (RMS value) to the RMS quantization
error (residual error). The ideal, theoretical minimum
analog-to-digital noise is caused by quantization error
only and results directly from the ADC’s resolution (N
bits):
SNR = (6.02 · N + 1.76)dB
In reality, there are other noise sources besides quanti-
zation noise: thermal noise, reference noise, clock jitter,
etc. Therefore, SNR is computed by taking the ratio of
the RMS signal to the RMS noise which includes all
spectral components minus the fundamental, the first
five harmonics, and the DC offset.
Signal-to-Noise Plus Distortion
Signal-to-noise plus distortion (SINAD) is the ratio of the
fundamental input frequency’s RMS amplitude to RMS
equivalent of all other ADC output signals:
SINAD (dB) = 20 · log (Signal RMS / Noise RMS )
Effective Number of Bits
Effective number of bits (ENOB) indicates the global
accuracy of an ADC at a specific input frequency and
sampling rate. An ideal ADC’s error consists of quanti-
zation noise only. With an input range equal to the full-
scale range of the ADC, calculate the effective number
of bits as follows:
ENOB = (SINAD - 1.76) / 6.02