Chip information, Pin configurations, Typical operating circuit – Rainbow Electronics MAX1039 User Manual
Page 21
In reality, there are other noise sources besides quanti-
zation noise, including thermal noise, reference noise,
clock jitter, etc. Therefore, SNR is computed by taking
the ratio of the RMS signal to the RMS noise, which
includes all spectral components minus the fundamen-
tal, the first five harmonics, and the DC offset.
Signal-to-Noise Plus Distortion
Signal-to-noise plus distortion (SINAD) is the ratio of the
fundamental input frequency’s RMS amplitude to RMS
equivalent of all other ADC output signals.
SINAD (dB) = 20
✕
log (Signal
RMS
/ Noise
RMS
)
Effective Number of Bits
Effective number of bits (ENOB) indicates the global
accuracy of an ADC at a specific input frequency and
sampling rate. An ideal ADC’s error consists of quanti-
zation noise only. With an input range equal to the
ADC’s full-scale range, calculate the ENOB as follows:
ENOB = (SINAD - 1.76) / 6.02
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the RMS
sum of the input signal’s first five harmonics to the fun-
damental itself. This is expressed as:
where V
1
is the fundamental amplitude, and V
2
through
V
5
are the amplitudes of the 2nd- through 5th-order
harmonics.
Spurious-Free Dynamic Range
Spurious-free dynamic range (SFDR) is the ratio of RMS
amplitude of the fundamental (maximum signal compo-
nent) to the RMS value of the next-largest distortion
component.
Chip Information
MAX1036/MAX1037 TRANSISTOR COUNT: 6283
MAX1038/MAX1039 TRANSISTOR COUNT: 7257
PROCESS: BiCMOS
THD
V
V
V
V
V
=
×
+
+
+
20
2
2
3
2
4
2
5
2
1
log /
MAX1036–MAX1039
2.7V to 5.5V, Low-Power, 4-/12-Channel
2-Wire Serial 8-Bit ADCs
______________________________________________________________________________________
21
SDA
SCL
AIN3/REF
1
2
8
7
V
DD
GND
AIN1
AIN2
AIN0
SOT23
TOP VIEW
3
4
6
5
MAX1036
MAX1037
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
AIN7
AIN8
AIN9
AIN10
AIN11/REF
V
DD
GND
SDA
SCL
MAX1038
MAX1039
QSOP
AIN6
AIN5
AIN2
AIN4
AIN3
AIN1
AIN0
Pin Configurations
*OPTIONAL
*R
S
*R
S
ANALOG
INPUTS
µC
SDA
SCL
GND
V
DD
SDA
SCL
AIN0
AIN1
AIN2
AIN3/REF
5V
5V
R
P
R
P
5V
MAX1036
MAX1037
MAX1038
MAX1039
Typical Operating Circuit