Rainbow Electronics ADC08L060 - Manual (Page 6)

Converter Electrical Characteristics
(Continued)
The following specifications apply for V
A
= V
DR
= +3.0V
DC
, V
RT
= +1.9V, V
RB
= 0.3V, C
L
= 10 pF, f
CLK
= 60 MHz at 50% duty
cycle. Boldface limits apply for T
J
= T
MIN
to T
MAX
: all other limits T
J
= 25˚C (Notes 7, 8)
Symbol Parameter Conditions
Typical
(Note 9)
Limits
(Note 9)
Units
(Limits)
DYNAMIC PERFORMANCE
t
OD
Output Delay CLK to Data Transition 7.1
5.0 ns (min)
9.4 ns (max)
Pipeline Delay (Latency) 5 Clock Cycles
t
AD
Sampling (Aperture) Delay CLK Rise to Acquisition of Data 2.6 ns
t
AJ
Aperture Jitter 2 ps rms
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: All voltages are measured with respect to GND = AGND = DR GND = 0V, unless otherwise specified.
Note 3: When the input voltage at any pin exceeds the power supplies (that is, less than AGND or DR GND, or greater than V
A
or V
DR
), the current at that pin should
be limited to 25 mA. The 50 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of
25 mA to two.
Note 4: The absolute maximum junction temperature (T
J
max) for this device is 150˚C. The maximum allowable power dissipation is dictated by T
J
max, the
junction-to-ambient thermal resistance ( θ
JA
), and the ambient temperature (T
A
), and can be calculated using the formula P
D
MAX = (T
J
max − T
A
) / θ
JA
. The values
for maximum power dissipation will be reached only when this device is operated in a severe fault condition (e.g., when input or output pins are driven beyond the
power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided.
Note 5: Human body model is 100 pF capacitor discharged through a 1.5 k Ω resistor. Machine model is 220 pF discharged through ZERO Ohms.
Note 6: See AN-450, “Surface Mounting Methods and Their Effect on Product Reliability”.
Note 7: The analog inputs are protected as shown below. Input voltage magnitudes up to V
A
+ 300 mV or to 300 mV below GND will not damage this device.
However, errors in the A/D conversion can occur if the input goes above V
DR
or below GND by more than 100 mV. For example, if V
A
is 2.7V
DC
the full-scale input
voltage must be ≤2.8V
DC
to ensure accurate conversions.
20041707
Note 8: To guarantee accuracy, it is required that V A and V DR be well bypassed. Each supply pin must be decoupled with separate bypass capacitors.
Note 9: Typical figures are at T
J
= 25˚C, and represent most likely parametric norms. Test limits are guaranteed to National’s AOQL (Average Outgoing Quality
Level).
Note 10: I
DR
is the current consumed by the switching of the output drivers and is primarily determined by the load capacitance on the output pins, the supply
voltage, V
DR
, and the rate at which the outputs are switching (which is signal dependent), I
DR
= V
DR
(C
O
x f
O
+ C
1
x f
1
+ … + C
71
x f
7
) where V
DR
is the output
driver power supply voltage, C
n
is the total capacitance on any given output pin, and f
n
is the average frequency at which that pin is toggling.
ADC08L060
www.national.com 6