Rainbow Electronics DS2406 - Manual (Page 11)

DS2406
11 of 31
Memory Function Flow Chart (continued) Figure 7
Spare
Vertical
Write Memory
?
TA1(T7:T0), TA2 (T15:T8)
Bus Master TX
Address = (T15:T0)
DS2406 sets Memory
Y
Address, Data (1st pass); CRC16 of
Bus Master RX CRC16 of Command,
Address, Data (subsequent passes)
Data Byte (D7:D0)
Bus Master TX
CRC
Correct ?
Program Pulse
Bus Master TX
pad to Data EPROM
DS2406 copies Scratch-
from Data EPROM
Bus Master RX Byte
EPROM
Byte Correct
?
End of
Data Mem.
?
Address Counter
DS2406 increments
into CRC Generator
DS2406 loads new Address
R
To Figure 7
3rd Part
0Fh N
From Figure 7
1st Part
N
Write Status
?
TA1(T7:T0), TA2 (T15:T8)
Bus Master TX
Address = (T15:T0)
DS2406 sets Memory
S
Y
Data Byte (D7:D0)
Bus Master TX
CRC
Correct ?
Program Pulse
Bus Master TX
pad to Status EPROM
DS2406 copies Scratch-
from Status EPROM
Bus Master RX Byte
EPROM
Byte Correct
?
Address < 7
?
Address Counter
DS2406 increments
into CRC Generator
DS2406 loads new Address
55h
Address, Data (1st pass); CRC16 of
Bus Master RX CRC16 of Command,
Address, Data (subsequent passes)
Reset Pulse
Bus Master TX
Presence Pulse
DS2406 TX
Byte From
Bus Master RX
Volatile Status
Scratchpad to
DS2406 copies
Volatile Status
Legend:
Decision made
by Bus Master
Decision made
by DS2406
Bus Master
TX FFh or
Program Pulse
Y
N
Y
N
Y
N Y
N
Y
N
Y
N