Rainbow Electronics DS92001 - Manual

DS92001
3.3V B/LVDS-BLVDS Buffer
General Description
The DS92001 B/LVDS-BLVDS Buffer takes a BLVDS input
signal and provides an BLVDS output signal. In many large
systems, signals are distributed across backplanes, and one
of the limiting factors for system speed is the ’stub length’ or
the distance between the transmission line and the untermi-
nated receivers on individual cards. Although it is generally
recognized that this distance should be as short as possible
to maximize system performance, real-world packaging con-
cerns often make it difficult to make the stubs as short as the
designer would like.
The DS92001 has edge transitions optimized for multidrop
backplanes where the switching frequency is in the 200 MHz
range or less. The output edge rate is critical in some sys-
tems where long stubs may be present, and utilizing a slow
transition allows for longer stub lengths.
The DS92001, available in the LLP (Leadless Leadframe
Package) package, will allow the receiver inputs to be placed
very close to the main transmission line, thus improving
system performance.
A wide input dynamic range allows the DS92001 to receive
differential signals from LVPECL as well as LVDS sources.
This will allow the device to also fill the role of an LVPECL-
BLVDS translator.
The LOS pin detects a non-driven B/LVDS bus state at the
input and provides an active LOW output. The LOS pin can
be tied to the device’s output enable pin (EN) to generate a
TRI-STATE output state when the input is un-driven. The
LOS pin can also be used locally to inform the system of the
bus state.
Features
n Single +3.3 V Supply
n B/LVDS receiver inputs accept LVPECL signals
n TRI-STATE outputs
n Loss of Signal (LOS) pin detects a non-driven bus
n Receiver input threshold < ± 100 mV
n Fast propagation delay of 1.4 ns (typ)
n Low jitter 400 Mbps fully differential data path
n Compatible with BLVDS 10-bit SerDes (40MHz)
n Compatible with ANSI/TIA/EIA-644-A LVDS standard
n Available in SOIC and space saving LLP package
n Industrial Temperature Range
Connection and Block Diagrams
SOIC - Top View
20024705
LLP - Top View
20024743
DAP (GND) Pad Not Shown
20024702
Functional Operation
BLVDS Inputs BLVDS Outputs
[IN+] − [IN−] OUT+ OUT−
VID ≥ 0.1V H L
VID ≤ −0.1V L H
Full Fail-safe
OPEN/SHORTor Terminated
H L
Ordering Information
Order Number NS Pkg. No. Pkg. Type
DS92001TM M08A SOIC
DS92001TLD LDA08A LLP
June 2002
DS92001
3.3V
B/L
VDS-BL
VDS
Buffer
© 2002 National Semiconductor Corporation DS200247 www.national.com