Table 4. configuration register (continued) – Rainbow Electronics MAX7315 User Manual

Page 15

output port registers, and using the software or hard-
ware controls to flip between the patterns.

If the blink phase 1 register is written with 0xFF, then
the BLINK input can be used as a hardware disable to,
for example, instantly turn off an LED pattern pro-
grammed into the blink phase 0 register. This tech-
nique can be further extended by driving the BLINK
input with a PWM signal to modulate the LED current to
provide fading effects.

The blink mode is enabled by setting the blink enable
flag E in the configuration register (Table 4). When blink
mode is enabled, the state of the blink flip flag sets the
phase, and the output ports are set by either the blink

phase 0 register or the blink phase 1 register (Table 7).

The blink mode is disabled by clearing the blink enable
flag E in the configuration register (Table 4). When blink
mode is disabled, the blink phase 0 register alone con-
trols the output ports.

Blink Phase Registers

When the blink function is disabled, the blink phase 0
register sets the logic levels of the 8 ports (P0 through
P7) when configured as outputs (Table 8). A duplicate
register called the blink phase 1 register is also used if
the blink function is enabled (Table 9). A logic high sets
the appropriate output port high impedance, while a
logic low makes the port go low.

MAX7315

8-Port I/O Expander with LED Intensity

Control and Interrupt

______________________________________________________________________________________

Table 4. Configuration register (continued)

REGISTER DATA

REGISTER

ADDRESS

CODE

(HEX)

CONFIGURATION

INTERRUPT

STATUS

—

INTERRUPT

OUTPUT

CONTROL

AS GPO

INTERRUPT

ENABLE

GLOBAL

INTENSITY

BLINK FLIP

BLINK

ENABLE

Disable data change interrupt—INT/O8

output is controlled by the O0 and O1 bits

—

INT

Enable data change interrupt—INT/O8

output is controlled by port input data

change

—

INT/O8 output is low (blink is disabled)

—

INT/O8 output is high impedance (blink is

disabled)

—

INT/O8 outp ut i s l ow d ur i ng b l i nk p hase 0

—

INT/O8 output is high impedance during

blink phase 0

—

INT/O8 outp ut i s l ow d ur i ng b l i nk p hase 1

—

INT/O8 output is high impedance during

blink phase 1

—

Read-back data change interrupt status

—data change is not detected, and

INT/O8 output is high when interrupt

enable (I bit) is set

Read-back data change interrupt status

—data change is detected, and INT/O8

output is low when interrupt enable (I bit)

is set

0x0F