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Chip information, Pin configuration, Switching power mosfet losses – Rainbow Electronics MAX16831 User Manual

Page 15: Layout recommendations

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When using the MAX16831 in a boost or buck-boost
configuration, the input RMS current is low and the
input capacitance can be small.

Operating the MAX16831 Without the

Dimming Switch

The MAX16831 can also be used in the absence of the
dimming MOSFET. In this case, the PWM dimming per-
formance is compromised but in applications that do
not require dimming, the MAX16831 can still be used.
A short circuit across the load will cause the MAX16831
to disable the gate drivers and they will remain off until
the input power is recycled.

Switching Power MOSFET Losses

When selecting MOSFETs for switching, consider the
total gate charge, power dissipation, the maximum
drain-to-source voltage, and package thermal imped-
ance. The product of the MOSFET gate charge and
R

DS(ON)

is a figure of merit, with a lower number signi-

fying better performance. Select MOSFETs optimized
for high-frequency switching applications.

MOSFET losses may be broken into three categories:
conduction loss, gate drive loss, and switching loss.
The following simplified power loss equation is true for
all the different configurations.

P

LOSS

= P

CONDUCTION

+ P

GATEDRIVE

+ P

SWITCH

Layout Recommendations

Typically, there are two sources of noise emission in a
switching power supply: high di/dt loops and high dv/dt
surfaces. For example, traces that carry the drain cur-
rent often form high di/dt loops. Similarly, the heatsink
of the MOSFET connected to the device drain presents
a high dv/dt source; therefore, minimize the surface
area of the heatsink as much as possible. Keep all PCB
traces carrying switching currents as short as possible
to minimize current loops. Use ground planes for best
results.

Careful PCB layout is critical to achieve low switching
losses and clean, stable operation. Use a multilayer
board whenever possible for better noise performance
and power dissipation. Follow these guidelines for
good PCB layout:

• Use a large copper plane under the MAX16831

package. Ensure that all heat-dissipating compo-
nents have adequate cooling. Connect the exposed
pad of the device to the ground plane.

• Isolate the power components and high-current paths

from sensitive analog circuitry.

• Keep the high-current paths short, especially at the

ground terminals. This practice is essential for sta-
ble, jitter-free operation. Keep switching loops short.

• Connect AGND, SGND, and QGND to a ground

plane. Ensure a low-impedance connection between
all ground points.

• Keep the power traces and load connections short.

This practice is essential for high efficiency. Use
thick copper PCBs (2oz vs. 1oz) to enhance full-load
efficiency.

• Ensure that the feedback connection to FB is short

and direct.

• Route high-speed switching nodes away from the

sensitive analog areas.

• To prevent discharge of the compensation capaci-

tors, C1 and C2, during the off-time of the dimming
cycle, ensure that the PCB area close to these com-
ponents has extremely low leakage. Discharge of
these capacitors due to leakage may result in
degraded dimming performance.

Chip Information

PROCESS: BICMOS

MAX16831

High-Voltage, High-Power LED Driver with

Analog and PWM Dimming Control

______________________________________________________________________________________

15

32

31

30

29

28

27

26

9

10

11

12

13

14

15

18

19

20

21

22

23

24

7

6

5

4

3

2

1

MAX16831

TQFN

(5mm x 5mm)

TOP VIEW

UVEN

N.C.

REG1

AGND

REF

DIM

RTSYNC

8

CLKOUT

I.C.

V

CC

REG2

HI

CLMP

CS-

CS+

25

LO

N.C.

DGT

QGND

SNS-

SNS+

DRI

DRV

17

SGND

OV

FB

16

SGND

CS

COMP

I.C.

I.C.

I.C.

*EP

+

*EP = EXPOSED PAD

Pin Configuration